PXB4220EV3.4X Infineon Technologies, PXB4220EV3.4X Datasheet - Page 68

• Manufacturer Part Number: PXB4220EV3.4X
• Manufacturer: Infineon Technologies

Specifications of PXB4220EV3.4X

• Data Rate: 2.048Mbps
• Number Of Channels: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

If the first cell has maximum negative CDV there will be “starv_ini” + 1 octets left in the
Reassembly Buffer at any time a cell with maximum positive CDV is followed by a cell
with maximum negative CDV. the following cell arrives with maximum negative CDV. In
case the following cell arrives with maximum positive CDV it will be “starv_ini” + 1 plus
the amount of data to be transmitted in the expectation interval. Just after cell arrival the
filling level of the Reassembly Buffer is at its maximum:
To allow CDV compensation and SDT structure synchronization, the logical size should
be programmed to a minimum value given by:
with FR being the number of frames in a structure:
Pmax is the maximum number of payload octets from the pointer field to the start of
structure:
The logical Reassembly Buffer size is limited by its physical size. The relation is given by:
where
When the robust SC algorithm is used, the decision on cell acceptance is delayed until
the next cell is received. As the cell is temporarily stored in the Reassembly Buffer, there
must always be space for that cell. Therefore, the physical size of the Reassembly Buffer
must be at least the logical size plus one cell.
In the fast SC algorithm the intermediate storage of a cell is not required. The cell is
stored immediately in the Reassembly Buffer, when accepted.
The delay introduced by the Reassembly Buffer is:
Data Sheet
bufflsize 8
starvini 125 s
----------------------------------------- -
bufflsize
FR = 0: when SDT is not used
FR = 1: for frame based SDT
FR = 16: for multi-frame based SDT in E1 mode
FR = 24: for multi-frame based SDT in T1 mode
Pmax = N x FR, if N x FR < 2 x part_fill
Pmax = 2 x part_fill, if N x FR > 2 x part_fill
S = 0: in case of Fast Sequence Count Algorithm
S = 1: in case of Robust Sequence Count Algorithm
bufflsize partfill
N
N partfill cellsperblock S partfill
partfill
delay
+
+
-------------------------------------------------------------------------------------------- -
4
starvini
starvini
CDV
+
+ +
FR N
1
-------------- -
125 s
68
N
–
PXB 4219E, PXB 4220E, PXB 4221E
N
+
+ max
+
FR N
P
FR N
+
+
Pmax
125 s
Pmax
Operational Description
IWE8, V3.4
2003-01-20
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