ICS839893AYIT IDT, Integrated Device Technology Inc, ICS839893AYIT Datasheet

ICS839893AYIT

Manufacturer Part Number

ICS839893AYIT

Description

Manufacturer

IDT, Integrated Device Technology Inc

Datasheet

1.ICS839893AYIT.pdf (10 pages)

Specifications of ICS839893AYIT

Lead Free Status / RoHS Status

Supplier Unconfirmed

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clock inputs and it generates 13 new LVCMOS/LVTTL clock

outputs. The first bank of six outputs offers divide-by-1, 2, 4,

8 or 16. The second bank of six outputs can be configured to

the same divide ratio as the first bank, or with an additional

divide-by-two. The first two banks can be placed into a high-

impedance output state with the assertion of a LOW on the

nOE/MR input. One additional output can be configured

to divide-by-4, 6, 8 or 16. This device is functional with full

3.3V or full 2.5V supplies.

839893AYI

REF_SEL

FSEL[0:2]

HiPerClockS™

nOE/MR

IC S

FSEL3

IMPLIFIED

ENERAL

CLK0

CLK1

device has two selectable LVCMOS/LVTTL

The ICS839893I is a high-performance one to

thirteen LVCMOS/LVTTL buffer/divider and is

a member of the HiPerClockS™ family of High

Performance Clock Solutions from ICS. The

Integrated

Circuit

Systems, Inc.

ESCRIPTION

LOCK

FSEL0 FSEL1

FSEL0 FSEL1 FSEL2 QA

FSEL0 FSEL1 FSEL2 QC

IAGRAM

FSEL2

÷1

÷16

÷1

÷2

÷4

÷2

÷8

÷4

÷16

÷8

÷6

÷8

÷4

÷8

÷4

÷2

www.icst.com/products/hiperclocks.html

D Q

• 13 LVCMOS/LVTTL outputs: 3 banks (6, 6, 1 outputs per

• Selectable CLK0 or CLK1 LVCMOS/LVTTL clock inputs

• CLK0, CLK1 supports the following input types:

• Maximum output frequency: 250MHz

• Output skew: 40ps (maximum), within bank

• Full 3.3V or 2.5V operating supply

• -40°C to 85°C ambient operating temperature

• Available in both, Standard and RoHS/Lead-Free compliant

bank respectively)

LVCMOS, LVTTL

packages

EATURES

QA0:QA5

QB0:QB5

LVCMOS/LVTTL B

DDO

GND

QA0

QA1

QA2

QA3

QA4

QA5

36 35 34 33 32 31 30 29 28 27 26 25

1 2 3 4 5 6 7 8 9 10 11 12

7mm x 7mm x 1.4mm

SSIGNMENT

ICS839893I

body package

48-Pin LQFP

Y Package

Top View

ICS839893I

UFFER

KEW

REV. A AUGUST 8, 2005

, 1-

IVIDER

-13

GND

QB0

QB1

GND

QB2

QB3

GND

QB4

QB5

DDO

Related parts for ICS839893AYIT

ICS839893AYIT Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS839893I is a high-performance one thirteen LVCMOS/LVTTL buffer/divider and is a member of the HiPerClockS™ family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has two ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc ABLE LOCK REQUENCY UNCTION ...

Page 4

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Package Thermal Impedance, θ JA Storage Temperature, T STG T 4A ABLE OWER UPPLY HARACTERISTICS S ...

Page 5

Integrated Circuit Systems, Inc. T 4C. LVCMOS/LVTTL DC C ABLE HARACTERISTICS ...

Page 6

Integrated Circuit Systems, Inc ABLE HARACTERISTICS ...

Page 7

Integrated Circuit Systems, Inc. P ARAMETER 1.65V±5% V DD, V DDO_A DDO_B, DDO_C LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD V DDOX DDOX Qy 2 tsk( UTPUT ...

Page 8

Integrated Circuit Systems, Inc ECOMMENDATIONS FOR NUSED I : NPUTS CLK I : NPUT For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1kΩ ...

Page 9

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR ABLE ...

Page 10

Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

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