83840BHT IDT, Integrated Device Technology Inc, 83840BHT Datasheet

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83840BHT

Manufacturer Part Number
83840BHT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of 83840BHT

Number Of Clock Inputs
10
Mode Of Operation
Single-Ended
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Package Type
TFBGA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant
IDT™ / ICS™ DDR SDRAM MUX
DDR SDRAM MUX
G
cation: 8 data lines, 1 strobe line and 1 DQm line. The Host/
Data Ports are compatible with single-ended SSTL-2 and the
device operates from a 2.5V supply.
Guaranteed low output skew makes the ICS83840B ideal
for demanding applications which require well defined per-
formance and repeatability.
S
P
G
A
B
C
D
E
H
K
F
83840BH
HiPerClockS™
HPx
J
L
ICS
nSn
IMPLIFIED
IN
ENERAL
2
1
0
1
0
3
n
V
D
D
D
D
D
D
n
1
S
D
c
P
P
P
P
P
P
A
D
2
9
9
9
8
8
7
SSIGNMENT
3
3
2
2
G
G
The ICS83840B is a DDR SDRAM MUX and is
a member of the HiPerClockS™ family of High
Performance Clock Solutions from ICS. The de-
vice has 10 Host Lines and each host line can
be passed to 4 Data Ports. The 10 channels are
allocated as follows in the DDR SDRAM appli-
H
H
n
n
V
D
D
D
D
S
N
N
2
S
P
P
D
P
P
P
P
D
3
1
D
D
9
8
9
8
8
7
Integrated
Circuit
Systems, Inc.
D
S
ESCRIPTION
1
H
n
CHEMATIC
D
n
3
S
P
c
P
0
7
7
SW
0
G
D
N
4
P
D
7
1
0
3
2
D
D
D
D
5
P
P
P
P
0
0
6
6
www.icst.com/products/hiperclocks.html
2
1
H
H
D
D
400Ω
6
P
P
P
P
0
6
0
6
3
0
0
G
D
D
D
7
N
P
P
P
D
nDPx
0
6
1
3
1
D
D
1
8
1
P
P
F
• 40 low skew single-ended DIMM ports
• 4 SSTL-2 compatible enable inputs
• Maximum Switching Speed: 3ns
• Output skew: 120ps (maximum)
• Bank skew: 60ps (maximum)
• r
• Full 2.5V supply modes
• 0°C to 70°C ambient operating temperature
• Pin compatible with the CBTV4010
L
5
1
nS0
nS1
nS2
nS3
OGIC
EATURES
on
HP0
HP9
2
2
= 8Ω (typical)
H
H
D
D
P
9
P
P
P
5
R
R
1
5
1
ON
ON
D
3
0
0
3
3
1
G
G
H
H
H
D
D
D
D
D
D
10
IAGRAM
N
N
P
P
P
P
P
P
P
P
P
D
2
3
D
4
2
3
4
4
1
5
0
2
2
3
2
0
1
1
1
Sw
Sw
D
D
D
D
D
D
11
D
D
D
P
P
P
P
P
P
P
P
P
2
2
3
3
4
5
2
3
4
Sw
Sw
DDR SDRAM MUX
Sw
Sw
7mm x 7mm x 1.2mm
64-Ball TFBGA
ICS83840B
ICS83840B
package body
H Package
Sw
Sw
Top View
REV. A JANUARY 30, 2004
DATA SHEET
0DP0
1DP0
2DP0
3DP0
0DP9
1DP9
2DP9
3DP9
ICS83840B
ICS83840B

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83840BHT Summary of contents

Page 1

Integrated DDR SDRAM MUX Circuit Systems, Inc ENERAL ESCRIPTION The ICS83840B is a DDR SDRAM MUX and is ICS a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The de- HiPerClockS™ vice has 10 ...

Page 2

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Ports DC Input Clamp Current Package Thermal Impedance, θ Storage Temperature, T STG T 4A ...

Page 4

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc. P ARAMETER V = 1.25V ± 0. LVCMOS GND -1.25V ± 0.1V This circuit is used for test purposes only, not intended for application use. 2. ...

Page 5

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc. 6. θ ABLE VS IR LOW ABLE JA Two-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second ...

Page 6

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc ACKAGE UTLINE UFFIX 83840BH IDT™ / ICS™ DDR SDRAM MUX ABLE ACKAGE IMENSIONS ...

Page 7

Integrated ICS83840B Circuit DDR SDRAM MUX Systems, Inc ABLE RDERING NFORMATION ...

Page 8

ICS650-40A ICS83840B ICS252 ETHERNET SWITCH CLOCK SOURCE DDR SDRAM MUX FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 ...

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