ICS83940AY-02T IDT, Integrated Device Technology Inc, ICS83940AY-02T Datasheet
ICS83940AY-02T
Specifications of ICS83940AY-02T
Related parts for ICS83940AY-02T
ICS83940AY-02T Summary of contents
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G D ENERAL ESCRIPTION The ICS83940- low skew, 1-to-18 Fanout Buffer . The 83940-02 has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single ended clock input accepts LVCMOS or ...
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ABLE IN ESCRIPTIONS ...
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BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, θ JA Storage Temperature, T -65°C to 150°C STG T 4A ...
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T 4C ABLE IFFERENTIAL HARACTERISTICS ...
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T 5B 3.3V±5%; V ABLE HARACTERISTICS ...
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P ARAMETER 1.65V± DDO LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD 2.05V±5% 1.25V± DDO LVCMOS GND -1.25V±5% 3.3V C /2. ORE UTPUT OAD ...
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Clock t Outputs UTPUT ISE ALL IME V DDO 2 Q0:Q17 Pulse Width t PERIOD t PW odc = t PERIOD UTPUT UTY YCLE ULSE IDTH 83940AY-02 ...
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IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias resistors R1, R2 and C1. This bias ...
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IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING the V and V input requirements. Figures show PP CMR interface examples for ...
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PPLICATION CHEMATIC XAMPLE Figure 3 shows an example of ICS83940-02 application sche- matic. In this example, the device is operated at V decoupling capacitor should be located as close as possible to the power pin. The differential ...
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ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row ...
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ACKAGE UTLINE UFFIX FOR ABLE ACKAGE ...
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ABLE RDERING NFORMATION ...
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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...