ICS8701AY-01 IDT, Integrated Device Technology Inc, ICS8701AY-01 Datasheet

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ICS8701AY-01

Manufacturer Part Number
ICS8701AY-01
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of ICS8701AY-01

Number Of Clock Inputs
1
Mode Of Operation
Single-Ended
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS8701AY-01LF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS8701AY-01LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
G
the ability of the outputs to drive two series terminated lines.
The divide select inputs, DIV_SELx, control the output frequency
of each bank. The outputs can be utilized in the ÷1, ÷2 or a combi-
nation of ÷1 and ÷2 modes. The master reset/output enable input,
nMR/OE, resets the internal dividers and controls the active and
high impedance states of all outputs. The output polarity inputs,
INV0:1, control the polarity (inverting or non-inverting) of the out-
puts of each bank. Outputs QA0:QA4 are inverting for every com-
bination of the INV0:1 input. The timing relationship between the
inverting and non-inverting outputs at different frequencies is
shown in the Timing Diagrams.
The ICS8701-01 is characterized at 3.3V and mixed 3.3V input
supply, and 2.5V output supply operating modes. Guaranteed
bank, output and part-to-part skew characteristics make the
ICS8701-01 ideal for those clock distribution applications demand-
ing well defined performance and repeatability.
B
ICS8701AY-01 REVISION E MARCH 2, 2010
DIV_SELC
DIV_SELD
DIV_SELA
DIV_SELB
HiPerClockS™
IC S
nMR/OE
LOCK
ENERAL
INV0
INV1
CLK
D
tive fanout can be increased from 20 to 40 by utilizing
LVCMOS outputs are designed to drive 50
or parallel terminated transmission lines. The effec-
The ICS8701-01 is a low skew, 1, 2 LVCMOS/
LVTTL Clock Generator. The low impedance
IAGRAM
D
÷2
÷1
ESCRIPTION
Low Skew, ÷1, ÷2 LVCMOS/ LVTTL
Clock Generator w/PolarIity Control
1
0
1
0
1
0
Polarity
Control
Output
1
0
QA0:QA4
QB0:QB4
QC0:QC4
QD0:QD4
series
1
F
• Twenty LVCMOS/LVTTL outputs, 7
• One LVCMOS/LVTTL clock input
• Maximum output frequency: 250MHz
• Selectable inverting and non-inverting outputs
• Bank enable logic allows unused banks to be
• Output skew: 300ps (maximum)
• Part-to-part skew: 700ps (maximum)
• Bank skew: 250ps (maximum)
• Multiple frequency skew: 350ps (maximum)
• 3.3V or mixed 3.3V input, 2.5V output operating supply
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
disabled in reduced fanout applications
packages
EATURES
P
V
V
V
GND
GND
QC3
QC4
QD0
QD1
QD2
QD3
QD4
DDOC
DDOD
DDOD
IN
A
7mm x 7mm x 1.4mm package body
1
2
3
4
5
6
7
8
9
10
11
12
SSIGNMENT
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
ICS8701-01
48-Pin LQFP
Y Package
Top View
2010 Integrated Device Technology, Inc.
typical output impedance
36
35
34
33
32
31
30
29
28
27
26
25
ICS8701-01
QB1
V
QB0
QA4
V
QA3
GND
QA2
GND
QA1
V
QA0
DDOB
DDOA
DDOA

Related parts for ICS8701AY-01

ICS8701AY-01 Summary of contents

Page 1

... DIV_SELD nMR/OE Output INV0 Polarity INV1 Control ICS8701AY-01 REVISION E MARCH 2, 2010 F EATURES • Twenty LVCMOS/LVTTL outputs, 7 • One LVCMOS/LVTTL clock input series • Maximum output frequency: 250MHz • Selectable inverting and non-inverting outputs • Bank enable logic allows unused banks to be disabled in reduced fanout applications • ...

Page 2

... ICS8701-01 Data Sheet ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS ABLE UNCTION ABLE ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL 2010 Integrated Device Technology, Inc ...

Page 3

... ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL 4.6V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the -0. 0 device. These ratings are stress specifications only. Functional op- -0. 0.5V eration of product at these conditions or any conditions beyond ...

Page 4

... ICS8701-01 Data Sheet T 5A ABLE HARACTERISTICS 5A ABLE HARACTERISTICS ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL = V = 3.3V±5 0°C 70° DDO 3.3V±5 0°C 70° DDO 2010 Integrated Device Technology, Inc ...

Page 5

... ICS8701-01 Data Sheet T 5B ABLE HARACTERISTICS ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL = 3.3V±5 2.5V±5 0°C A DDO 70° 2010 Integrated Device Technology, Inc ...

Page 6

... PERIOD UTPUT UTY YCLE ULSE IDTH CLK QAx,QBx, V DDOx QCx, QDx ROPAGATION ELAY ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL M EASUREMENT SCOPE Qx LVCMOS C 3.3V C EST IRCUIT UTPUT QAx, QBx, QCx, QDx x 100 ERIOD UTPUT I NVERTING 6 I NFORMATION 2.05V ± ...

Page 7

... Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS8701-01 is: 1819 ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL R I ELIABILITY NFORMATION 48 L ...

Page 8

... ICS8701-01 Data Sheet ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-026 ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL LQFP EAD ACKAGE IMENSIONS ° ° 2010 Integrated Device Technology, Inc. ...

Page 9

... Any other applications such as those requiring extended temperature ranges, high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL g ...

Page 10

... ICS8701-01 Data Sheet & & & & & & & & & & & & ICS8701AY-01 REVISION E MARCH 2, 2010 LOW SKEW LVCMOS/ LVTTL CLOCK GENERATOR W/POLARITY CONTROL " " 2010 Integrated Device Technology, Inc ...

Page 11

Silver Creek Valley Road Sales San Jose, CA 95138 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein ...

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