ICS85356AMI IDT, Integrated Device Technology Inc, ICS85356AMI Datasheet

ICS85356AMI

Manufacturer Part Number
ICS85356AMI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of ICS85356AMI

Number Of Clock Inputs
4/2
Mode Of Operation
Differential
Output Frequency
900MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-3/3V
Operating Supply Voltage (typ)
-3.3/3.3V
Operating Supply Voltage (max)
-3.8/3.6V
Package Type
SOIC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS85356AMILF
Quantity:
1 069
General Description
determined by the setting of the SEL0 pin for channel 0 and the
SEL1 pin for Channel 1.
The differential input has a common mode range that can accept
most differential input types such as LVPECL, LVDS, LVHSTL,
SSTL, and HCSL. The ICS85356I can therefore be used as a
differential translator to translate almost any differential input type to
LVPECL. It can also be used in ECL mode by setting V
V
The ICS85356I adds negligible jitter to the input clock and can
operate at high frequencies in excess of 900MHz thus making
it ideal for use in demanding applications such as SONET,
Fibre Channel, 1 Gigabit/10 Gigabit Ethernet.
COM_SEL
ICS85356AMI REVISION B MAY 10, 2010
Block Diagram
HiPerClockS™
EE
nCLK0A
nCLK1A
ICS
CLK0A
CLK0B
CLK0B
CLK1A
CLK1B
CLK1B
to -3.0V to - 3.8V.
SEL0
SEL1
Pulldown
Pullup
Pulldown
Pullup
Pullup
Pulldown
Pullup
Pulldown
Pullup
Pulldown
Pullup
The ICS85356I is a dual 2:1 Differential-to-LVPECL
Multiplexer. The device has both common select and
individual select inputs. When COM_SEL is logic High,
the CLKxx input pairs will be passed to the output.
When COM_SEL is logic Low, the output is
0
1
0
1
2:1, Differential-to-3.3V Dual LVPECL/ECL
Clock Multiplexer
Q0
nQ0
Q1
nQ1
CC
= 0V and
1
Features
High speed differential muliplexer. The device can be configured
as a 2:1 multiplexer
Dual 3.3V LVPECL outputs
Selectable differential CLKx/nCLKx input pairs
Differential CLKx/nCLKx pairs can accept the following interface
levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
Output frequency: 900MHz (typical)
Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nCLKx input
Output skew: 75ps (typical)
Propagation delay: 1.15ns (typical)
LVPECL mode operating voltage supply range:
V
ECL mode operating voltage supply range:
V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
CC
CC
= 3V to 3.8V, V
= 0V, V
7.5mm x 12.8mm x 2.3mm package body
6.5mm x 4.4mm x 0.92mm package body
EE
= -3V to -3.8V
Pin Assignment
EE
nCLK0A
nCLK0B
nCLK1A
nCLK1B
CLK0A
CLK0B
CLK1A
CLK1B
= 0V
20-Lead TSSOP
20-Lead SOIC
nc
nc
ICS85356I
ICS85356I
M Package
G Package
Top View
Top View
1
2
3
4
5
6
7
8
9
10
©2010 Integrated Device Technology, Inc.
20
19
18
17
16
15
14
13
12
11
V
nQ0
SEL0
COM_SEL
V
nQ1
Q0
SEL1
V
CC
CC
EE
ICS85356I
DATA SHEET

Related parts for ICS85356AMI

ICS85356AMI Summary of contents

Page 1

... Pulldown CLK1A 0 Pullup nCLK1A CLK1B Pulldown 1 Pullup CLK1B ICS85356AMI REVISION B MAY 10, 2010 Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • ...

Page 2

... PULLDOWN Function Tables Table 3. Control Input Function Table Inputs COM_SEL SEL1 ICS85356AMI REVISION B MAY 10, 2010 Type Description Power Positive supply pins. Input Pulldown Non-inverting differential clock input. Input Pullup Inverting differential clock input. Unused No connect. Input Pulldown Non-inverting differential clock input. ...

Page 3

... Input Low Voltage IL SEL0, SEL1 Input I IH High Current COM_SEL SEL0, SEL1 Input I IL Low Current COM_SEL ICS85356AMI REVISION B MAY 10, 2010 2:1, DIFFERENTIAL-TO-3.3V LVPECL/ECL CLOCK MULTIPLEXER Rating 4.6V -0. 0.5V CC 50mA 100mA 46.2°C/W (0 lfpm) 73.2°C/W (0 lfpm) -65°C to 150°C = 3.3V±0.3V 0V -40° ...

Page 4

... NOTE 1: Measured from the differential input crossing point to the differential output crossing point. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential cross points. NOTE 3: This parameter is defined according with JEDEC Standard 65. ICS85356AMI REVISION B MAY 10, 2010 = 3.3V±0.3V 0V ...

Page 5

... LVPECL Output Load AC Test Circuit nQx nQx nQy nQy tsk(o) Output Skew nCLKxA, nCLKxB CLKxA, CLKxB nQ0, nQ1 Q0 Propagation Delay ICS85356AMI REVISION B MAY 10, 2010 V CC SCOPE nCLKxA, Qx nCLKxB CLKxA, CLKxB nQx V EE Differential Input Level nQ0, nQ1 Q0, Q1 Output Rise/Fall Time nCLKxA, nCLKxB ...

Page 6

... Control Pins All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1kΩ resistor can be used. ICS85356AMI REVISION B MAY 10, 2010 line impedance. For most 50Ω applications, R3 and R4 can be 100Ω generated by The values of the resistors can be increased to reduce the loading for CC slower and weaker LVCMOS driver ...

Page 7

... HCSL *Optional – R3 and R4 can be 0Ω Figure 2E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS85356AMI REVISION B MAY 10, 2010 only. Please consult with the vendor of the driver component to and V must meet the confirm the driver termination requirements. For example, in Figure ...

Page 8

... Figure 3A. 3.3V LVPECL Output Termination ICS85356AMI REVISION B MAY 10, 2010 transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 3A and 3B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may ...

Page 9

... Linear Feet per Minute Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB design use multi-layered boards. The data in the second row pertains to most designs. ICS85356AMI REVISION B MAY 10, 2010 = 3.3V + 0.3V = 3.6V, which gives worst case results ...

Page 10

... Pd_H = [(V – (V – 2V))/R OH_MAX CC_MAX [(2V – 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V – (V – 2V))/R OL_MAX CC_MAX [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS85356AMI REVISION B MAY 10, 2010 V OUT RL 50Ω – 0.9V CC_MAX = V – ...

Page 11

... Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB design use multi-layered boards. The data in the second row pertains to most designs. Transistor Count The transistor count for ICS85356I is: 446 ICS85356AMI REVISION B MAY 10, 2010 2:1, DIFFERENTIAL-TO-3.3V LVPECL/ECL CLOCK MULTIPLEXER θ by Velocity ...

Page 12

... Reference Document: JEDEC Publication 95, MO-153 ICS85356AMI REVISION B MAY 10, 2010 2:1, DIFFERENTIAL-TO-3.3V LVPECL/ECL CLOCK MULTIPLEXER Package Outline - M Suffix for 20 Lead SOIC Table 7B. Package Dimensions for 20 Lead SOIC 300 Millimeters All Dimensions in Millimeters Symbol Minimum Maximum ...

Page 13

... Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS85356AMI REVISION B MAY 10, 2010 2:1, DIFFERENTIAL-TO-3.3V LVPECL/ECL CLOCK MULTIPLEXER Package ...

Page 14

... LVPECL DC Characteristics Table - corrected V B 8-9 Power Considerations - corrected power dissipation to reflect Ordering Information Table - added ICS85356AMI lead-free part/order number and lead-free note. 3 Absolute Maximum Ratings - added TSSOP Package Thermal Impedance. 5 Parameter Measurement Information - corrected Output Duty Cycle Skew diagram. 6 Added Recommendations for Unused Input/Output Pins section. ...

Page 15

ICS85356I Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

Related keywords