ICS8533AGI-31 IDT, Integrated Device Technology Inc, ICS8533AGI-31 Datasheet - Page 10

• Manufacturer Part Number: ICS8533AGI-31
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8533AGI-31

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Crystal Input Interface
A crystal can be characterized for either series or parallel mode
operation. The ICS8533I-31 fanout buffer has a built-in crystal
oscillator circuit. This interface can accept either a series or parallel
crystal without additional components as shown in Figure 4. The
Figure 4. Crystal Input Interface
LVCMOS to XTAL Interface
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 5. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to half
swing in order to prevent signal interference with the power rail and
to reduce noise. This configuration requires that the output
Figure 5. General Diagram for LVCMOS Driver to XTAL Input Interface
IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
18pF Parallel Crystal
V
CC
Ro
X1
Rs
Zo = Ro + Rs
50Ω
C1
22p
C2
22p
XTAL_IN
XTAL_OUT
V
CC
R1
R2
0.1µf
XTAL_IN
XTAL_OUT
10
physical location of the crystal should be located as close as
possible to the XTAL_IN and XTAL_OUT pins. The experiments
show that using a 19.44MHz crystal results in an output frequency
of 19.4404746MHz and approximately 44% of duty cycle.
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be
done in one of two ways. First, R1 and R2 in parallel should equal
the transmission line impedance. For most 50Ω applications, R1
and R2 can be 100Ω. This can also be accomplished by removing
R1 and making R2 50Ω.
ICS8533AGI-31 REV. A DECEMBER 13, 2007
PRELIMINARY