TDA8295HN/C1 NXP Semiconductors, TDA8295HN/C1 Datasheet - Page 68

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TDA8295HN/C1

Manufacturer Part Number
TDA8295HN/C1
Description
Modulator / Demodulator IF DEMODULATOR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8295HN/C1

Package / Case
HVQFN-40
Maximum Operating Temperature
+ 70 C
Maximum Power Dissipation
490 mW
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.2 V, 3.3 V
Supply Current
0.136 A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
TDA8295HN/C1,557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA8295HN/C1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
14. Test information
TDA8295_1
Product data sheet
14.1 Boundary scan interface ( “IEEE Std. 1149.1” )
Table 69.
The TDA8295 implements a boundary scan architecture to allow access to, and control of,
board test support features within integrated circuits through a TAP. The TAP controller is
a synchronous state machine that controls the sequence of operations on the TAP
circuitry when the TMS signal changes. All state transitions occur on the basis of the TMS
value on the rising edge of TCK. The instruction register is a shift register based design. It
decodes the test to be performed and/or the test data register to be accessed. The
instructions are shifted into the register through the TDI and are latched as the current
instruction at the completion of the shifting process. The TDA8295 boundary scan
architecture includes: a TAP controller, a scannable instruction register and three
scannable test data registers: a boundary scan register, a device ID register, and a bypass
register.
The supported instructions are: EXTEST, IDCODE, SAMPLE, INTEST, CLAMP, HIGHZ
and BYPASS.
The boundary scan register is composed of 16 cells (see
associated either to an input pad, an output pad, a bidirectional pad or to the bidirectional
or 3-state command itself. All cells are of ‘observe and control’ type.
The device ID register is a 32-bit identification register that is included in the scan register
itself and contains the ID number. It is a fixed value that identifies the chip.
Fundamental
oscillation
frequency
Bit HF = 1
10 MHz to
15 MHz
15 MHz to
20 MHz
20 MHz to
25 MHz
25 MHz to
30 MHz
30 MHz to
35 MHz
35 MHz to
40 MHz
40 MHz to
45 MHz
45 MHz to
50 MHz
Crystal parameters together with external components
Digital global standard low IF demodulator for analog TV and FM radio
Crystal load
capacitance
C
10
20
10
20
10
20
10
20
10
10
10
10
L(xtal)
Rev. 01 — 4 February 2008
(pF)
Crystal series
resistance
R
< 200
< 120
< 180
< 100
< 160
< 80
< 130
< 60
< 120
< 100
< 80
< 60
s(xtal)
( )
External load capacitors
C1 (pF)
18
39
18
39
18
39
18
39
18
18
18
18
Table
70). Each cell is
…continued
TDA8295
© NXP B.V. 2008. All rights reserved.
C2 (pF)
18
39
18
39
18
39
18
39
18
18
18
18
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