TDA8295HN/C1 NXP Semiconductors, TDA8295HN/C1 Datasheet - Page 43

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TDA8295HN/C1

Manufacturer Part Number
TDA8295HN/C1
Description
Modulator / Demodulator IF DEMODULATOR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8295HN/C1

Package / Case
HVQFN-40
Maximum Operating Temperature
+ 70 C
Maximum Power Dissipation
490 mW
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.2 V, 3.3 V
Supply Current
0.136 A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
TDA8295HN/C1,557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA8295HN/C1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
TDA8295_1
Product data sheet
9.3.17 ADC control
In the TDA8295 a 12-bit ADC is implemented sampling with a 54 MHz clock (27 MHz
optional).
Table 51.
Legend: * = default value.
Bit
7
6 to 4 CS[2:0]
3
2
1
0
Symbol
GAINSET R/W
DCIN
TWOS
SLEEP
PD_ADC
ADC_CTL register (address 33h) bit description
Digital global standard low IF demodulator for analog TV and FM radio
Access Value
R/W
R/W
R/W
R/W
R/W
Rev. 01 — 4 February 2008
0*
1
000
001
010*
011
100
101
110
111
0*
1
0
1*
0*
1
0*
1
Description
The track and hold circuit in the converter has a
programmable gain setting, which is controlled by the
GAINSET parameter. In case the gain of the track and hold is
increased, the input range of the ADC is decreased
accordingly.
The current consumption of the ADC can be programmed
with these two bits. It is possible to increase or decrease the
current by the following ratio:
The input signal of the ADC can be either AC coupled by
means of two capacitors or connected directly to the inputs
(DC coupled).
This parameter controls the output format of the ADC.
When HIGH, SLEEP sets the ADC into its Sleep mode. Both
bias current and clock are switched off. In this mode, the
current consumption is reduced by a factor of 6. The
reference circuit will remain active in order to guarantee a fast
recovery from Sleep mode.
When HIGH, PD_ADC sets the ADC into its Power-down
mode. All internal currents are switched off. In this mode, the
current consumption is near zero (leakage current only).
2.0 V (p-p)
1.0 V (p-p) (6 dB gain)
not allowed
not allowed
0.50 (recommended for 54 MHz sampling)
0.75
1.00
1.25
1.50
not allowed
AC coupling
DC coupling
offset binary format
twos complement format
Normal mode
ADC Sleep mode
Normal mode
ADC Power-down mode
TDA8295
© NXP B.V. 2008. All rights reserved.
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