PUMD48,115 NXP Semiconductors, PUMD48,115 Datasheet - Page 5

• Manufacturer Part Number: PUMD48,115
• Description: TRANS NPN/PNP 50V 100MA SOT363
• Manufacturer: NXP Semiconductors

Specifications of PUMD48,115

• Package / Case: SC-70-6, SC-88, SOT-363
• Transistor Type: 1 NPN, 1 PNP - Pre-Biased (Dual)
• Current - Collector (ic) (max): 100mA
• Voltage - Collector Emitter Breakdown (max): 50V
• Resistor - Base (r1) (ohms): 47K, 2.2K
• Resistor - Emitter Base (r2) (ohms): 47K
• Dc Current Gain (hfe) (min) @ Ic, Vce: 80 @ 5mA, 5V / 100 @ 10mA, 5V
• Vce Saturation (max) @ Ib, Ic: 150mV @ 500µA, 10mA / 100mV @ 250µA, 5mA
• Current - Collector Cutoff (max): 1µA
• Power - Max: 300mW
• Mounting Type: Surface Mount
• Configuration: Dual
• Transistor Polarity: NPN/PNP
• Typical Input Resistor: 47 KOhm or 2.2 KOhm
• Typical Resistor Ratio: 1 or 0.05
• Mounting Style: SMD/SMT
• Collector- Emitter Voltage Vceo Max: 50 V
• Peak Dc Collector Current: 100 mA
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency - Transition: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 934055444115; PUMD48 T/R; PUMD48 T/R

NXP Semiconductors
7. Characteristics
PEMD48_PUMD48_5
Product data sheet
Table 8.
T
Symbol
Per transistor; for the PNP transistor with negative polarity
I
I
Transistor TR1 (NPN)
I
h
V
V
V
R1
R2/R1
C
Transistor TR2 (PNP)
I
h
V
V
V
R1
R2/R1
C
CBO
CEO
EBO
EBO
amb
FE
FE
CEsat
I(off)
I(on)
CEsat
I(off)
I(on)
c
c
= 25
°
C unless otherwise specified.
Characteristics
Parameter
collector-base
cut-off current
collector-emitter
cut-off current
emitter-base
cut-off current
DC current gain
collector-emitter
saturation voltage
off-state input voltage
on-state input voltage
bias resistor 1 (input)
bias resistor ratio
collector capacitance
emitter-base
cut-off current
DC current gain
collector-emitter
saturation voltage
off-state input voltage
on-state input voltage
bias resistor 1 (input)
bias resistor ratio
collector capacitance
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
V
V
V
V
Conditions
V
I
V
I
V
I
T
V
I
V
I
I
I
I
V
I
I
f = 1 MHz
V
I
V
I
I
I
I
V
I
I
f = 1 MHz
E
B
B
C
C
C
B
C
C
E
C
C
C
B
C
C
E
j
CB
CE
CE
EB
CE
CE
CE
CB
EB
CE
CE
CE
CB
= 0 A
= 0 A
= 0 A;
= 150 °C
= 0 A
= 5 mA
= 10 mA;
= 0.5 mA
= 100 μA
= 2 mA
= i
= 0 A
= −10 mA
= −5 mA;
= −0.25 mA
= −100 μA
= −5 mA
= i
= 50 V;
= 30 V;
= 30 V;
= 5 V;
= 5 V;
= 5 V;
= 0.3 V;
= 10 V;
= −5 V;
= −5 V;
= −5 V;
= −0.3 V;
= −10 V;
e
e
= 0 A;
= 0 A;
NPN/PNP resistor-equipped transistors
PEMD48; PUMD48
Min
-
-
-
-
80
-
-
3
33
0.8
-
-
100
-
-
−1.1
1.54
17
-
Typ
-
-
-
-
-
-
1.2
1.6
47
-
-
-
-
−0.6
−0.75
2.2
-
1
21
© NXP B.V. 2010. All rights reserved.
Max
100
1
50
90
-
150
0.8
-
61
1.2
2.5
−180
-
−100
−0.5
-
2.86
26
3
kΩ
V
kΩ
Unit
nA
μA
μA
μA
mV
V
V
pF
μA
mV
V
pF
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