72V2103L15PFG Integrated Device Technology (Idt), 72V2103L15PFG Datasheet - Page 45

• Manufacturer Part Number: 72V2103L15PFG
• Description: FIFO Mem Sync Dual Depth/Width Uni-Dir 128K x 18/256K x 9 80-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72V2103L15PFG

• Package: 80TQFP
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 2.25 Mb
• Organization: 128Kx18|256Kx9
• Data Bus Width: 18|9 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 3.3 V
• Operating Temperature: 0 to 70 °C

HIGH-IMPEDANCE
as well as three-state types) of an IC to a disabled (high-impedance) state and
selects the one-bit bypass register to be connected between TDI and TDO.
During this instruction, data can be shifted through the bypass register from TDI
to TDO without affecting the condition of the IC outputs.
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
The optional High-Impedance instruction sets all outputs (including two-state
TM
NARROW BUS FIFO
TM
45
NARROW BUS FIFO
BYPASS
functional mode and selects the one-bit bypass register to be connected
between TDI and TDO. The BYPASS instruction allows serial data to be
transferred through the IC from TDI to TDO without affecting the operation of
the IC.
The required BYPASS instruction allows the IC to remain in a normal
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JUNE 1, 2010