MT48LC4M32B2P-6 IT:G Micron Technology Inc, MT48LC4M32B2P-6 IT:G Datasheet - Page 56

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MT48LC4M32B2P-6 IT:G

Manufacturer Part Number
MT48LC4M32B2P-6 IT:G
Description
DRAM Chip SDRAM 128M-Bit 4Mx32 3.3V 86-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC4M32B2P-6 IT:G

Package
86TSOP-II
Density
128 Mb
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Clock Rate
166 MHz
Maximum Random Access Time
17|7.5|5.5 ns
Operating Temperature
-40 to 85 °C
Figure 39:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. L 1/09 EN
COMMAND
A0–A9, A11
BA0, BA1
DQM0–3
CKE
A10
CLK
DQ
t CKS
t CMS
t AS
t AS
t AS
Read – With Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, and CL = 2.
2. A8, A9, and A11 = “Don’t Care.”
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CMH
t CH
CAS Latency
T3
NOP
t LZ
t AC
56
T4
D
NOP
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
m
t OH
t AC
+ 1
D
T6
OUT
NOP
m
t OH
t AC
t RP
+ 2
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
D
T7
OUT
NOP
m
t OH
Timing Diagrams
t HZ
+ 3
T8
ACTIVE
ROW
BANK
ROW
DON’T CARE
UNDEFINED

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