ATF-55143-BLKG Avago Technologies US Inc., ATF-55143-BLKG Datasheet - Page 2

• Manufacturer Part Number: ATF-55143-BLKG
• Description: IC PHEMT 2GHZ 2.7V 10MA SOT-343
• Manufacturer: Avago Technologies US Inc.

Specifications of ATF-55143-BLKG

• Package / Case: SC-70-4, SC-82-4, SOT-323-4, SOT-343
• Transistor Type: pHEMT FET
• Frequency: 2GHz
• Gain: 17.7dB
• Voltage - Rated: 5V
• Current Rating: 100mA
• Noise Figure: 0.6dB
• Current - Test: 10mA
• Voltage - Test: 2.7V
• Power - Output: 14.4dBm
• Configuration: Single Dual Source
• Transistor Polarity: N-Channel
• Power Dissipation: 270 mW
• Drain Source Voltage Vds: 5 V
• Gate-source Breakdown Voltage: - 5 V to 1 V
• Continuous Drain Current: 100 mA
• Maximum Operating Temperature: + 150 C
• Maximum Drain Gate Voltage: - 5 V to 1 V
• Minimum Operating Temperature: - 65 C
• Mounting Style: SMD/SMT
• Continuous Drain Current Id: 100mA
• Power Dissipation Pd: 270mW
• Noise Figure Typ: 0.6dB
• Rf Transistor Case: SC-70
• No. Of Pins: 4
• Frequency Max: 6GHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1869; ATF-55143-BLKG

ATF-55143 Absolute Maximum Ratings
I
I
P
P
T
T
θ
Notes:
1. Operation of this device above any one of these parameters may
2. Assumes DC quiescent conditions.
3. Source lead temperature is 25°C. Derate 4.3 mW/°C for T
4. Thermal resistance measured using 150°C Liquid Crystal Measure‑
5. Device can safely handle +10 dBm RF Input Power as long as I
Product Consistency Distribution Charts
Notes:
6. Distribution data sample size is 500 samples taken from 6 different wafers. Future wafers allocated to this product may have nominal values
7. Measurements made on production test board. This circuit represents a trade‑off between an optimal noise match and a realizeable match
2
Symbol
V
V
V
300
250
200
150
100
Figure 2. OIP3 @ 2.7 V, 10 mA.
LSL = 22.0, Nominal = 24.2
DS
GS
CH
50
diss
in max.
STG
jc
DS
GS
GD
0
cause permanent damage.
ment method.
limited to 1 mA. I
applications section for additional information.
anywhere between the upper and lower limits.
based on production test equipment. Circuit losses have been de‑embedded from actual measurements.
22
-3 Std
23
OIP3 (dBm)
GS
24
at P
1dB
drive level is bias circuit dependent. See
25
Cpk = 2.02
Stdev = 0.36
Gate Drain Voltage
Drain Current
Drain‑Source Voltage
Gate‑Source Voltage
Gate Current
RF Input Power
(Vds=2.7V, Ids=10mA)
(Vds=0V, Ids=0mA)
(Vds=0V, Ids=0mA)
Channel Temperature
Storage Temperature
Thermal Resistance
ESD (Human Body Model)
ESD (Machine Model)
Parameter
Total Power Dissipation
26
[1]
[5]
[2]
[5]
Figure 3. Gain @ 2.7 V, 10 mA.
USL = 18.5, LSL = 15.5, Nominal = 17.7
[6, 7]
200
160
120
80
40
0
[2]
[4]
15
[2]
[2]
Cpk = 1.023
Stdev = 0.28
[3]
L
> 87°C.
16
GS
is
GAIN (dB)
-3 Std
17
Units
V
V
V
mA
mA
mW
dBm
dBm
dBm
dBm
°C
°C
°C/W
V
V
Figure 1. Typical I-V Curves.
(V
GS
70
60
50
40
30
20
10
0
18
= 0.1 V per step)
0
+3 Std
1
19
2
V
3
DS
240
200
160
120
Figure 4. NF @ 2.7 V, 10 mA.
USL = 0.9, Nominal = 0.6
80
40
(V)
0
0.43
4
5
0.53
Absolute
Maximum
5
‑5 to 1
‑5 to 1
100
1
270
10
10
10
10
150
‑65 to 150
235
200
25
6
0.7V
0.6V
0.5V
0.4V
0.3V
0.63
+3 Std
NF (dB)
7
0.73
Cpk = 3.64
Stdev = 0.031
0.83
0.93