NTD3055-094-1G ON Semiconductor, NTD3055-094-1G Datasheet - Page 5

MOSFET N-CH 60V 12A IPAK

NTD3055-094-1G

Manufacturer Part Number
NTD3055-094-1G
Description
MOSFET N-CH 60V 12A IPAK
Manufacturer
ON Semiconductor
Datasheet

Specifications of NTD3055-094-1G

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
94 mOhm @ 6A, 10V
Drain To Source Voltage (vdss)
60V
Current - Continuous Drain (id) @ 25° C
12A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
20nC @ 10V
Input Capacitance (ciss) @ Vds
450pF @ 25V
Power - Max
1.5W
Mounting Type
Surface Mount
Package / Case
IPak, TO-251, DPak, VPak (3 straight leads + tab)
Transistor Polarity
N Channel
Continuous Drain Current Id
12A
Drain Source Voltage Vds
60V
On Resistance Rds(on)
94mohm
Rds(on) Test Voltage Vgs
10V
Threshold Voltage Vgs Typ
2.9V
Rohs Compliant
Yes
Configuration
Single
Resistance Drain-source Rds (on)
0.094 Ohms
Forward Transconductance Gfs (max / Min)
6.7 S
Drain-source Breakdown Voltage
60 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
12 A
Power Dissipation
48 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (T
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance −
General Data and Its Use.”
traverse any load line provided neither rated peak current
(I
transition time (t
power averaged over a complete switching cycle must not
exceed (T
in switching circuits with unclamped inductive loads. For
DM
The Forward Biased Safe Operating Area curves define
Switching between the off−state and the on−state may
A Power MOSFET designated E−FET can be safely used
10
12
8
6
4
2
0
) nor rated voltage (V
0
Figure 8. Gate−To−Source and Drain−To−Source
J(MAX)
Q
1
2
r
,t
Voltage versus Total Charge
Q
− T
f
) do not exceed 10 ms. In addition the total
G
, TOTAL GATE CHARGE (nC)
C
)/(R
4
qJC
Q
T
Q
).
DSS
2
6
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
) is exceeded and the
16
14
12
10
8
6
4
2
0
Figure 10. Diode Forward Voltage versus Current
0.6
8
V
T
V
J
GS
SD
= 25°C
V
GS
= 0 V
I
T
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
D
0.68
J
SAFE OPERATING AREA
C
= 12 A
= 25°C
10
) of 25°C.
http://onsemi.com
0.76
12
5
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
drain−to−source avalanche at currents up to rated pulsed
current (I
continuous current (I
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous I
equal the values indicated.
100
0.84
Although many E−FETs can withstand the stress of
10
1
1
DM
t
Figure 9. Resistive Switching Time
0.92
t
d(on)
Variation versus Gate Resistance
d(off)
), the energy rating is specified at rated
t
t
r
f
R
G
, GATE RESISTANCE (OHMS)
D
), in accordance with industry custom.
1
10
D
can safely be assumed to
V
I
V
D
DS
GS
= 12 A
= 30 V
= 10 V
100

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