PHB47NQ10T,118 NXP Semiconductors, PHB47NQ10T,118 Datasheet - Page 4

MOSFET N-CH 100V 47A D2PAK

PHB47NQ10T,118

Manufacturer Part Number
PHB47NQ10T,118
Description
MOSFET N-CH 100V 47A D2PAK
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PHB47NQ10T,118

Package / Case
D²Pak, TO-263 (2 leads + tab)
Mounting Type
Surface Mount
Power - Max
166W
Fet Type
MOSFET N-Channel, Metal Oxide
Gate Charge (qg) @ Vgs
66nC @ 10V
Vgs(th) (max) @ Id
4V @ 1mA
Current - Continuous Drain (id) @ 25° C
47A
Drain To Source Voltage (vdss)
100V
Fet Feature
Standard
Rds On (max) @ Id, Vgs
28 mOhm @ 25A, 10V
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.028 Ohm @ 10 V
Drain-source Breakdown Voltage
100 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
47 A
Power Dissipation
166000 mW
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934056745118::PHB47NQ10T /T3::PHB47NQ10T /T3
NXP Semiconductors
5. Thermal characteristics
Table 5.
PHB47NQ10T_2
Product data sheet
Symbol
R
R
Fig 3.
Fig 5.
th(j-mb)
th(j-a)
P
(%)
der
120
80
40
0
function of mounting base temperature
Normalized total power dissipation as a
Transient thermal impedance from junction to mounting base as a function of pulse duration
0
Thermal characteristics
Parameter
thermal resistance from
junction to mounting
base
thermal resistance from
junction to ambient
Z
th (j-mb)
(K/W)
50
10
10
10
−2
1
−3
−1
10
−7
100
0.05
0.02
0.5
0.2
0.1
δ =
10
−6
Conditions
see
mounted on printed-circuit board;
minimum footprint
150
Figure 5
All information provided in this document is subject to legal disclaimers.
Single pulse
T
10
mb
−5
03aa16
(°C)
Rev. 02 — 25 February 2010
200
10
−4
10
−3
Fig 4.
I
(A)
AS
10
10
10
2
1
−2
as a function of pulse duration
10
Non-repetitive avalanche ruggedness current
−3
N-channel TrenchMOS standard level FET
T
j
10
P
prior to avalanche = 150 °C
−1
10
−2
t
p
T
1
Min
-
-
δ =
003aaa099
10
PHB47NQ10T
t
p
−1
(s)
t
T
p
t
10
Typ
-
50
1
© NXP B.V. 2010. All rights reserved.
t
25 °C
p
003aaa098
Max
0.9
-
(ms)
10
Unit
K/W
K/W
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