DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 253

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 3: Excessive Zero Count (EXZC) – When 0, the excessive zero count is zero. When 1, the excessive zero
count is one or more.
Bit 1: Bipolar Violation Count (BPVC) – When 0, the bipolar violation count is zero. When 1, the bipolar violation
count is one or more.
Bit 0: Loss Of Signal (LOS) – When 0, the receive line is not in a loss of signal (LOS) condition. When 1, the
receive line is in an LOS condition. See Section 10.14.5.
Note: When zero suppression (B3ZS or HDB3) decoding is disabled, the LOS condition is cleared, and cannot be
detected.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 5: Zero Suppression Code Detect Latched (ZSCDL) – This bit is set when a B3ZS or HDB3 signature is
detected.
Bit 4: Excessive Zero Latched (EXZL) – This bit is set when an excessive zero event is detected on the incoming
bipolar data stream.
Bit 3: Excessive Zero Count Latched (EXZCL) – This bit is set when the LINE.RSR.EXZC bit transitions from
zero to one.
Bit 2: Bipolar Violation Latched (BPVL) – This bit is set when a bipolar violation (or E3 LCV if enabled) is
detected on the incoming bipolar data stream.
Bit 1: Bipolar Violation Count Latched (BPVCL) – This bit is set when the LINE.RSR.BPVC bit transitions from
zero to one.
Bit 0: Loss of Signal Change Latched (LOSL) – This bit is set when the LINE.RSR.LOS bit changes state.
15
15
—
—
—
—
7
7
14
14
—
—
—
—
6
6
LINE.RSR
Line Receive Status Register
(0.2.4.6)94h
LINE.RSRL
Line Receive Status Register Latched
(0.2.4.6)96h
ZSCDL
13
13
—
—
—
5
5
EXZL
12
—
12
—
—
4
4
253
EXZCL
EXZC
11
11
—
—
3
3
BPVL
10
10
—
—
—
2
2
BPVCL
BPVC
—
—
9
1
9
1
LOSL
LOS
—
—
8
0
8
0