SL28748ELC Silicon Laboratories Inc, SL28748ELC Datasheet - Page 13

• Manufacturer Part Number: SL28748ELC
• Description: Clock Generators & Support Products Calpella IronLake Jasper Forest IbexPk
• Manufacturer: Silicon Laboratories Inc

Specifications of SL28748ELC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DOC#: SP-AP-0017 (Rev. AA)
AC Electrical Specifications
Crystal
T
T
T
T
L
Clock Input
T
T
T
T
V
V
I
I
CPU at 0.7V
T
T
T
T
T
T
T
T
T
T
Skew
L
T
T
V
V
V
SRC at 0.7V
T
T
T
T
T
IL
IH
DC
PERIOD
R
CCJ
ACC
DC
R
CCJ
LTJ
DC
PERIOD
PERIOD
PERIODSS
PERIODSS
PERIODAbs
PERIODAbs
PERIODSSAbs
PERIODSSAbs
CCJ
ACC
R
RFM
DC
PERIOD
PERIODSS
PERIODAbs
PERIODSSAbs
IL
IH
HIGH
LOW
OX
Parameter
/T
/T
/ T
F
F
F
XIN Duty Cycle
XIN Period
XIN Rise and Fall Times
XIN Cycle to Cycle Jitter
Long-term Accuracy
CLKIN Duty Cycle
CLKIN Rise and Fall Times
CLKIN Cycle to Cycle Jitter
CLKIN Long Term Jitter
Input Low Voltage
Input High Voltage
Input LowCurrent
Input HighCurrent
CPUT and CPUC Duty Cycle
100 MHz CPUT and CPUC Period
133 MHz CPUT and CPUC Period
100 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
133 MHz CPUT and CPUC Period, SSC Measured at 0V differential at 0.1s
100 MHz CPUT and CPUC Absolute
period
133 MHz CPUT and CPUC Absolute
period
100 MHz CPUT and CPUC Absolute
period, SSC
133 MHz CPUT and CPUC Absolute
period, SSC
CPU Cycle to Cycle Jitter
CPU0 to CPU1 skew
Long-term Accuracy
CPU Rising/Falling Slew rate
Rise/Fall Matching
Voltage High
Voltage Low
Crossing Point Voltage at 0.7V Swing
SRC Duty Cycle
100 MHz SRC Period
100 MHz SRC Period, SSC
100 MHz SRC Absolute Period
100 MHz SRC Absolute Period, SSC
Description
The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
When XIN is driven from an external
clock source
Measured between 0.3V
As an average over 1-s duration
Measured at VDD/2 differential
Measured at VDD/2
Measured between 0.2V
Measured at VDD/2
Measured at VDD/2
XIN / CLKIN pin
XIN / CLKIN pin
XIN / CLKIN pin, 0 < VIN <0.8
XIN / CLKIN pin, VIN = VDD
Measured at 0V differential
Measured at 0V differential at 0.1s
Measured at 0V differential at 0.1s
Measured at 0V differential at 1 clock
Measured at 0V differential at 1 clock
Measured at 0V differential at1 clock
Measured at 0V differential at1 clock
Measured at 0V differential
Measured at 0V differential
Measured at 0V differential
Measured differentially from ±150 mV
Measured single-endedly from ±75 mV
Measured at 0V differential
Measured at 0V differential at 0.1s
Measured at 0V differential at 0.1s
Measured at 0V differential at 1 clock
Measured at 0V differential at 1 clock
Condition
DD
DD
and 0.7V
and 0.8V
DD
DD
10.02406
9.914063
10.02406
9.99900
7.49925
7.51804
9.91400
7.41425
7.41430
9.99900
9.87400
9.87406
69.841
Min.
47.5
–0.3
300
0.5
2.5
47
45
45
–
–
–
–
–
–
2
–
–
–
–
–
–
SL28748
VDD+0.3
10.00100
10.02607
10.02607
7.50075
7.51955
10.0860
7.58575
10.1362
7.62340
10.0010
10.1260
10.1762
Page 13 of 19
Max.
52.5
71.0
10.0
1.15
500
250
250
350
100
100
550
4.0
0.8
53
20
35
55
85
20
55
8
–
V/ns
V/ns
Unit
ppm
ppm
mV
uA
uA
ns
ns
ps
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ns
ns
ns
ns
%
%
%
%
%
V
V
V
V