CS493263-CLZ Cirrus Logic Inc, CS493263-CLZ Datasheet - Page 9

• Manufacturer Part Number: CS493263-CLZ
• Description: Audio DSPs IC Multi-Standard Audio Decoder
• Manufacturer: Cirrus Logic Inc

Specifications of CS493263-CLZ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.6. Switching Characteristics —
(VA, VD[3:1] = 2.5 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, C
Notes: 5. The minimum RESET pulse listed above is valid only when using the recommended pull-up/pull-down
1.7. Switching Characteristics —
(VA, VD[3:1] = 2.5 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, C
DS339F7
RESET minimum pulse width low (-CL)
RESET minimum pulse width low (-IL)
All bidirectional pins high-Z after RESET low
Configuration bits setup before RESET high
Configuration bits hold after RESET high
CLKIN period for internal DSP clock mode
CLKIN high time for internal DSP clock mode
CLKIN low time for internal DSP clock mode
6. This specification is characterized but not production tested.
resistors on the RD, WR, PSEL and ABOOT mode pins. For Rev. D and older parts, pull-up/pull-down
resistors may be 4.7 k or 3.3 k. For Rev. E and newer parts, pull-up/pull-down resistors must be 3.3 k.
CLKIN
Parameter
Parameter
Figure 2. CLKIN with CLKSEL = VSS = PLL Enable
All Bidirectional
PSEL, ABOOT
RD, WR,
RESET
T
Pins
clkih
Figure 1. RESET Timing
T
clki
(Note 6)
(Note 5)
(Note 5)
T
T
rst2z
rstl
T
clkil
Symbol
Symbol
T
RESET
CLKIN
T
T
T
T
T
T
T
rsthld
rst2z
rstsu
clkih
T
clkil
clki
rstl
rstl
L
L
rstsu
= 20 pF)
= 20 pF, PLL Enabled)
T
rsthld
CS49300 Family DSP
Min
100
530
Min
50
15
35
14
14
-
3800
Max
Max
100
-
-
-
-
-
-
Unit
Unit
µs
µs
ns
ns
ns
ns
ns
ns
9