P0059 Terasic Technologies Inc, P0059 Datasheet - Page 48
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P0059
Manufacturer Part Number
P0059
Description
DE2-115 EVAL BOARD
Manufacturer
Terasic Technologies Inc
Series
Cyclone® IVr
Type
FPGAr
Datasheet
1.P0071.pdf
(116 pages)
Specifications of P0059
Contents
Board, Cables, CD, DVD, Power Adapter, Remote Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
EP4CE115
- Current page: 48 of 116
- Download datasheet (11Mb)
The voltage level of the I/O pins on the expansion headers can be adjusted to 3.3V, 2.5V, 1.8V, or
1.5V using JP6 (The default value is 3.3V, see
connected to Bank 4 of the FPGA and the VCCIO voltage (VCCIO4) of this bank is controlled by
the header JP6, users can use a jumper to select the input voltage of VCCIO4 to 3.3V, 2.5V, 1.8V,
and 1.5V to control the voltage level of the I/O pins.
The pin-outs of the JP6 appear in
JP6 Jumper Settings
Short Pins 1 and 2
Short Pins 3 and 4
Short Pins 5 and 6
Short Pins 7 and 8
Table 4-11 Voltage Level Setting of the Expansion Headers Using JP6
Figure 4-17 GPIO VCCIO supply voltage setting header
Supplied Voltage to VCCIO4
1.5V
1.8V
2.5V
3.3V
Figure
4-17.
47
Figure
Table 4-11
4-17). Because the expansion I/Os are
IO Voltage of Expansion Headers (JP5)
1.5V
1.8V
2.5V
3.3V (Default)
lists the jumper settings of the JP6.
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