AD8340ACPZ-WP Analog Devices Inc, AD8340ACPZ-WP Datasheet - Page 13

• Manufacturer Part Number: AD8340ACPZ-WP
• Description: IC MOD VECT 700-1000MHZ 24-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD8340ACPZ-WP

• Function: Vector, Modulator
• Lo Frequency: 700MHz ~ 1GHz
• Rf Frequency: 700MHz ~ 1GHz
• P1db: 11dBm
• Noise Floor: -149dBm/Hz
• Current - Supply: 150mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Test Frequency: 880MHz
• Package / Case: 24-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RF OUTPUT AND MATCHING
The RF outputs of the AD8340, RFOP, and RFOM, are open
collectors of a transimpedance amplifier that needs to be pulled
up to the positive supply, preferably with RF chokes, as shown
in Figure 31. The nominal output impedance looking into each
individual output pin is 25 Ω. Consequently, the differential
output impedance is 50 Ω.
Because the output dc levels are at the positive supply, ac
coupling capacitors are usually needed between the AD8340
outputs and the next stage in the system.
A 1:1 RF broadband output balun, such as the ETC1-1-13
(M/A-COM), converts the differential output of the AD8340
into a single-ended signal. Note that the loss and balance of the
balun directly impact the apparent output power, noise floor,
and gain/phase errors of the AD8340. In critical applications,
narrow-band baluns with low loss and superior balance are
recommended.
If the output is taken in a single-ended fashion directly into a
50 Ω load through a coupling capacitor, there is an impedance
mismatch. This can be resolved with a 1:2 balun to convert the
single-ended 25 Ω output impedance to 50 Ω. If loss-of-signal
swing is not critical, a 25 Ω back termination in series with the
output pin can also be used. The unused output pin must still be
pulled up to the positive supply. The user can load it through a
coupling capacitor with a dummy load to preserve balance. The
gain of the AD8340 when the output is single-ended varies
slightly with the dummy load value, as shown in Figure 32.
Figure 32. Gain of the AD8340 Using a Single-Ended Output with Different
±I
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
SIG
Figure 31. RF Output Interface to the AD8340 Showing
700
Coupling Capacitors, Pull-Up RF Chokes, and Balun
Dummy Loads, R
R
R
G
T
T
M
RFOM
RFOP
800
FREQUENCY (MHz)
DIFFERENTIAL
L2
120nH
R
R
on the Unused Output
L2
R
L2
V
50Ω
L2
P
= SHORT
= OPEN
= 50Ω
100pF
100pF
900
1:1
RF
OUTPUT
1000
Rev. B | Page 13 of 20
The RF output signal can be disabled by raising the DSOP pin
to the positive supply. The shutdown function provides >40 dB
attenuation of the input signal even at full gain. The interface
to DSOP is high impedance, and the shutdown and turn-on
response times are <100 ns. If the disable function is not
needed, the DSOP should be tied to ground.
DRIVING THE I-Q BASEBAND CONTROLS
The I and Q inputs to the AD8340 set the gain and phase
between input and output. These inputs are differential and
should normally have a common-mode level of 0.5 V. However,
when differentially driven, the common mode can vary from
250 mV to 750 mV while still allowing full gain control. Each
input pair has a nominal input swing of ±0.5 V differential
around the common-mode level. The maximum gain of unity
is achieved if the differential voltage is equal to +500 mV or
−500 mV. Therefore, with a common-mode level of 500 mV,
IBBP and IBBM each swings between 250 mV and 750 mV.
The I and Q inputs can also be driven with a single-ended
signal. In this case, one side of each input should be tied to a
low noise 0.5 V voltage source (a 0.1 μF decoupling capacitor
located close to the pin is recommended), while the other input
swings from 0 V to 1 V. Differential drive generally offers
superior even-order distortion and lower noise than single-
ended drive.
The bandwidth of the baseband controls exceeds 200 MHz even
at full-scale baseband drive. This allows for very fast gain and
phase modulation of the RF input signal. In cases where lower
modulation bandwidths are acceptable or desired, external filter
capacitors can be connected across Pin IFLP to Pin IFLM, and
across Pin QFLP to Pin QFLM, to reduce the ingress of base-
band noise and spurious signal into the control path.
The 3 dB bandwidth is set by choosing C
following equation:
This equation has been verified for values of C
0.1 μF (bandwidth settings of approximately 4.5 kHz to 43 MHz).
f
3
dB
≈
C
EXTERNAL
45
kHz
×
+
10
0
5 .
nF
pF
FLT
according to the
FLT
from 10 pF to
AD8340