LH7A404N0F092B3;55 NXP Semiconductors, LH7A404N0F092B3;55 Datasheet - Page 57

LH7A404N0F092B3/LFBGA324/TRAYD

LH7A404N0F092B3;55

Manufacturer Part Number
LH7A404N0F092B3;55
Description
LH7A404N0F092B3/LFBGA324/TRAYD
Manufacturer
NXP Semiconductors
Series
BlueStreak ; LH7Ar
Datasheet

Specifications of LH7A404N0F092B3;55

Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, IrDA, Microwire, MMC, PS2, SmartCard, SPI, SSI, SSP, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
324-LFBGA
Processor Series
LH7A4
Core
ARM9TDMI
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4304 - BOARD EVAL FOR LH7A404
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4336
935285071557
LH7A404N0F092B3
32-Bit System-on-Chip
Audio Codec Interface (ACI) Timing
in Figure 39 and Figure 40. Transmit data is clocked on
the rising edge of ACBITCLK (whether transmitted by
the LH7A404 ACI or by the external codec chip);
receive data is clocked on the falling edge. This allows
full-speed, full duplex operation.
Preliminary data sheet
The timing for the Audio Codec Interface are shown
ACBITCLK
ACSYNC
ACIN
BIT
ACSYNC/ACOUT
(SoC Output)
LCDDCLK
ACBITCLK
LCDVD
Figure 41. CLCDC Valid Output Data Time
ACIN
7
ACIN
SAMPLED ON
FALLING EDGE
Figure 39. ACI Signal Timing
Figure 40. ACI Data Stream
6
tOV
NXP Semiconductors
tOHD
5
tOVD
DATA VALID
4
Color LCD Controller Waveforms
LCD data. Timing diagrams for each CLCDC mode are
represented in Figure 42 through Figure 47.
tIS
Figure 41 shows the Valid Output Setup Time for
3
tIH
2
1
0
7
6
LH7A404-153
LH7A404-178
LH7A404-198
LH7A404
57

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