KSZ8893MQL Micrel Inc, KSZ8893MQL Datasheet - Page 58

• Manufacturer Part Number: KSZ8893MQL
• Description: IC,Telecom Switching Circuit,CMOS,QFP,128PIN,PLASTIC
• Manufacturer: Micrel Inc

Specifications of KSZ8893MQL

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1477-5

PHY1 Register 1 (PHYAD = 0x1, REGAD = 0x1): MII Basic Status
PHY2 Register 1 (PHYAD = 0x2, REGAD = 0x1): MII Basic Status
PHY1 Register 2 (PHYAD = 0x1, REGAD = 0x2): PHYID High
PHY2 Register 2 (PHYAD = 0x2, REGAD = 0x2): PHYID High
PHY1 Register 3 (PHYAD = 0x1, REGAD = 0x3): PHYID Low
PHY2 Register 3 (PHYAD = 0x2, REGAD = 0x3): PHYID Low
Bit
15
14
13
12
11
10-7
6
5
4
3
2
1
0
Bit
15-0
Bit
15-0
December 2007
Name
T4 capable
100 Full
capable
100 Half
capable
10 Full
capable
10 Half
capable
Reserved
Preamble
suppressed
AN complete
Far-end fault
AN capable
Link status
Jabber test
Extended
capable
Name
PHYID high
Name
PHYID low
RO
RO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
R/W
RO
Description
=0, Not 100 BASE-T4 capable
=1, 100BASE-TX full duplex capable
=0, Not capable of 100BASE-TX full duplex
=1, 100BASE-TX half duplex capable
=0, Not 100BASE-TX half duplex capable
=1, 10BASE-T full duplex capable
=0, Not 10BASE-T full duplex capable
=1, 10BASE-T half duplex capable
=0, Not 10BASE-T half duplex capable
NOT SUPPORTED
=1, Auto-negotiation complete
=0, Auto-negotiation not completed
=1, Far-end fault detected
=0, No far-end fault detected
=1, Auto-negotiation capable
=0, Not auto-negotiation capable
=1, Link is up
=0, Link is down
NOT SUPPORTED
=0, Not extended register capable
Description
High order PHYID bits
Description
Low order PHYID bits
58
Default
0
1
1
1
1
0000
0
0
0
1
0
0
0
Default
0x0022
Default
0x1430
Reference
Always 1
Always 1
Always 1
Always 1
Reg. 30, bit 6
Reg. 46, bit 6
Reg. 31, bit 0
Reg. 28, bit 7
Reg. 44, bit 7
Reg. 30, bit 5
Reg. 46, bit 5
M9999-121007-1.5