KSZ8893MQL Micrel Inc, KSZ8893MQL Datasheet - Page 54

• Manufacturer Part Number: KSZ8893MQL
• Description: IC,Telecom Switching Circuit,CMOS,QFP,128PIN,PLASTIC
• Manufacturer: Micrel Inc

Specifications of KSZ8893MQL

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1477-5

Loopback Support
The KSZ8893MQL/MBL provides loopback support for remote diagnostic of failure. In loopback mode, the speed
at both PHY ports needs to be set to 100BASE-TX. Two types of loopback are supported: Far-end Loopback
and Near-end (Remote) Loopback.
Far-end Loopback
Far-end loopback is conducted between the KSZ8893MQL/MBL’s two PHY ports. The loopback path starts at the
“Originating.” PHY port’s receive inputs (RXP/RXM), wraps around at the “loopback” PHY port’s PMD/PMA, and
ends at the “Originating” PHY port’s transmit outputs (TXP/TXM).
Bit [0] of registers 29 and 45 is used to enable far-end loopback for ports 1 and 2, respectively. Alternatively, the
MII Management register 0, bit [14] can be used to enable far-end loopback.
The far-end loopback path is illustrated in the following figure.
December 2007
R X P /
R X M
Figure 12: Far-End Loopback Path
P M D /P M A
P M D /P M A
S w itc h
O riginating
L oop B ack
P H Y P o rt
P H Y P o rt
M A C
M A C
P C S
P C S
54
T X P /
T X M
M9999-121007-1.5