EVAL-AD5821AEBZ Analog Devices Inc, EVAL-AD5821AEBZ Datasheet - Page 3

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EVAL-AD5821AEBZ

Manufacturer Part Number
EVAL-AD5821AEBZ
Description
Evaluation Board I.c.
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5821AEBZ

Number Of Dac's
1
Number Of Bits
10
Outputs And Type
1, Single Ended
Sampling Rate (per Second)
400k
Data Interface
I²C
Settling Time
250µs
Dac Type
Current
Voltage Supply Source
Single
Operating Temperature
-30°C ~ 80°C
Utilized Ic / Part
AD5821A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SPECIFICATIONS
V
otherwise noted.
Table 1.
Parameter
DC PERFORMANCE
OUTPUT CHARACTERISTICS
LOGIC INPUTS (XSHUTDOWN)
LOGIC INPUTS (SCL, SDA)
POWER REQUIREMENTS
1
2
3
4
5
6
7
Temperature range for the B version is −30°C to +85°C.
See the Terminology section.
Linearity is tested using a reduced code range: Code 32 to Code 1023.
To achieve near zero output current, use the power-down feature.
Guaranteed by design and characterization; not production tested. XSHUTDOWN is active low. SDA and SCL pull-up resistors are tied to 1.8 V.
Input filtering on both the SCL and the SDA inputs suppress noise spikes that are less than 50 ns.
XSHUTDOWN is active low.
DD
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Error
Offset Error @ Code 16
Gain Error
Offset Error Drift
Gain Error Drift
Minimum Sink Current
Maximum Sink Current
Output Current During XSHUTDOWN
Output Compliance
Output Compliance
Power-Up Time
Input Current
Input Low Voltage, V
Input High Voltage, V
Pin Capacitance
Input Low Voltage, V
Input High Voltage, V
Input Low Voltage, V
Input High Voltage, V
Input Leakage Current, I
Input Hysteresis, V
Digital Input Capacitance, C
Glitch Rejection
V
I
I
DD
DD
DD
= 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance (R
(Normal Mode)
(Power-Down Mode)
2
2, 5
5
2, 4
6
4, 5
2
HYST
5
5
INL
INL
INL
INH
INH
INH
2
4
5
2, 3
IN
7
5
IN
5
Min
0
0.6
0.48
1.26
−0.3
1.26
−0.3
1.4
0.05 V
2.7
DD
B Version
Typ
10
±1.5
0.5
0.5
10
±0.2
3
120
80
20
3
6
0.5
0.5
1
Max
±4
±1
1
±0.6
±0.5
V
V
±1
0.54
+0.54
V
+0.54
V
±1
50
5.5
1
Rev. 0 | Page 3 of 16
DD
DD
DD
DD
L
+ 0.3
+ 0.3
) = 25 Ω connected to V
Unit
Bits
LSB
LSB
mA
mA
% of FSR
μA/°C
LSB/°C
mA
nA
V
V
μs
pF
V
V
V
pF
ns
mA
μA
mA
μA
V
V
V
V
μA
V
Test Conditions/Comments
V
with reduced performance
117 μA/LSB
Guaranteed monotonic over all codes
All 0s loaded to DAC
at 25°C
XSHUTDOWN = 0
Output voltage range over which maximum 120 mA
sink current is available
Output voltage range over which 90 mA sink current
is available
To 10% of FS, coming out of power-down mode; V
V
V
V
V
V
V
V
Pulse width of spike suppressed
I
V
V
DD
DD
DD
DD
DD
DD
DD
DD
IN
INH
INH
= 0 V to V
specification is valid for all DAC codes;
= 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V
= 2.7 V to 5.5 V
= 2.7 V to 5.5 V
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
= 3.6 V to 5.5 V
= 3.6 V to 5.5 V
= 1.8 V, V
= 1.8 V, V
DD
. All specifications T
DD
INL
INL
= GND, V
= GND, V
DD
DD
= 2.7 V to 3.6 V
= 3 V
MIN
to T
MAX
, unless
AD5821A
DD
= 5 V

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