EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 190

Stratix II GX

EP2SGX90EF1152I4N

Manufacturer Part Number
EP2SGX90EF1152I4N
Description
Stratix II GX
Manufacturer
Altera
Datasheet

Specifications of EP2SGX90EF1152I4N

Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

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Price
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Operating Conditions
4–20
Stratix II GX Device Handbook, Volume 1
Fibre Channel Transmit Jitter Generation (8),
Total jitter FC-1
Deterministic jitter
FC-1
Total jitter FC-2
Deterministic jitter
FC-2
Total jitter FC-4
Deterministic jitter
FC-4
Fibre Channel Receiver Jitter Tolerance (8),
Deterministic jitter
FC-1
Random jitter FC-
1
Table 4–19. Stratix II GX Transceiver Block AC Specification
Description
Symbol/
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
REFCLK
106.25 MHz
Pattern = CRPAT
V
No Pre-emphasis
Pattern = CJTPAT
No Equalization
DC Gain = 0 dB
Pattern = CJTPAT
No Equalization
DC Gain = 0 dB
OD
OD
OD
OD
OD
OD
= 800 mV
= 800 mV
= 800 mV
= 800 mV
= 800 mV
= 800 mV
Conditions
=
=
=
=
=
=
Commercial Speed
Min
-
-
-
-
-
-
(18)
-3 Speed
(17)
> 0.37
> 0.31
Grade
Typ
-
-
-
-
-
-
Max
0.23
0.11
0.33
0.52
0.33
0.2
Notes
Min
Commercial and
Industrial Speed
-
-
-
-
-
-
(1), (2),
-4 Speed
> 0.37
> 0.31
Grade
Typ
-
-
-
-
-
-
(3)
Max
0.23
0.11
0.33
0.52
0.33
0.2
(Part 3 of 19)
Commercial Speed
Min
-
-
-
-
-
-
Altera Corporation
-5 Speed
Grade
> 0.37
> 0.31
Typ
-
-
-
-
-
-
June 2009
Max
0.23
0.11
0.33
0.52
0.33
0.2
Unit
UI
UI
UI
UI
UI
UI
UI
UI

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