DSPIC33FJ16GP304T-I/ML Microchip Technology, DSPIC33FJ16GP304T-I/ML Datasheet - Page 96
![16-bit DSC, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ16GP304T-I/ML
Manufacturer Part Number
DSPIC33FJ16GP304T-I/ML
Description
16-bit DSC, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
2.DSPIC33FJ16GP304-IPT.pdf
(284 pages)
3.DSPIC33FJ16GP304-IPT.pdf
(8 pages)
4.DSPIC33FJ16GP304-IPT.pdf
(14 pages)
Specifications of DSPIC33FJ16GP304T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ16GP304T-I/MLTR
- DSPIC33FJ12MC201-ISO PDF datasheet
- DSPIC33FJ16GP304-IPT PDF datasheet #2
- DSPIC33FJ16GP304-IPT PDF datasheet #3
- DSPIC33FJ16GP304-IPT PDF datasheet #4
- Current page: 96 of 284
- Download datasheet (4Mb)
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
REGISTER 7-19:
DS70290G-page 96
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7
bit 6-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
ILR<3:0>: New CPU Interrupt Priority Level bits
1111 = CPU Interrupt Priority Level is 15
•
•
•
0001 = CPU Interrupt Priority Level is 1
0000 = CPU Interrupt Priority Level is 0
Unimplemented: Read as ‘0’
VECNUM<6:0>: Vector Number of Pending Interrupt bits
0111111 = Interrupt Vector pending is number 135
•
•
•
0000001 = Interrupt Vector pending is number 9
0000000 = Interrupt Vector pending is number 8
U-0
R-0
—
INTTREG: INTERRUPT CONTROL AND STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
R-0
—
U-0
R-0
—
VECNUM<6:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-0
R-0
R-0
R-0
ILR<3:0>
© 2011 Microchip Technology Inc.
x = Bit is unknown
R-0
R-0
R-0
R-0
bit 8
bit 0
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