DSPIC33FJ16GP304T-I/ML Microchip Technology, DSPIC33FJ16GP304T-I/ML Datasheet - Page 169
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DSPIC33FJ16GP304T-I/ML
Manufacturer Part Number
DSPIC33FJ16GP304T-I/ML
Description
16-bit DSC, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
2.DSPIC33FJ16GP304-IPT.pdf
(284 pages)
3.DSPIC33FJ16GP304-IPT.pdf
(8 pages)
4.DSPIC33FJ16GP304-IPT.pdf
(14 pages)
Specifications of DSPIC33FJ16GP304T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ16GP304T-I/MLTR
- DSPIC33FJ12MC201-ISO PDF datasheet
- DSPIC33FJ16GP304-IPT PDF datasheet #2
- DSPIC33FJ16GP304-IPT PDF datasheet #3
- DSPIC33FJ16GP304-IPT PDF datasheet #4
- Current page: 169 of 284
- Download datasheet (4Mb)
18.0
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices have up to 13 Analog-to-Digital Conversion
(ADC) module input channels.
The AD12B bit (AD1CON1<10>) allows each of the
ADC modules to be configured as either a 10-bit,
4-sample-and-hold ADC (default configuration) or a
12-bit, 1-sample-and-hold ADC.
18.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 13 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
• Operation during CPU Sleep and Idle modes
• 16-word conversion result buffer
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
Note:
pins
fractional/integer)
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
Key Features
The ADC module must be disabled before
the AD12B bit can be modified.
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section
Converter (ADC)” (DS70183) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available on the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
16.
“Analog-to-Digital
in
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only one sample and hold (S&H) ampli-
Depending on the particular device pinout, the ADC
can have up to 13 analog input pins, designated AN0
through AN12. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other
analog input pins.
The actual number of analog input pins and external
voltage reference input configuration will depend on the
specific device. Refer to the specific device data sheet
for further details.
A
dsPIC33FJ16GP304 and dsPIC33FJ32GP204 devices
is shown in
the
Figure
18.2
To configure the ADC module:
1.
2.
3.
4.
5.
6.
7.
up to 500 ksps are supported.
fier in the 12-bit configuration, so simultaneous
sampling of multiple channels is not supported.
Select
(AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select voltage reference source to match
expected
(AD1CON2<15:13>).
Select the analog conversion clock to match
desired
(AD1CON3<7:0>).
Determine
channels will be used (AD1CON2<9:8> and
AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select
sequence
AD1CON3<12:8>).
Select the way conversion results are presented
in the buffer (AD1CON1<9:8>).
e)
Configure ADC interrupt (if required):
a)
b)
block
dsPIC33FJ32GP202
18-2.
ADC Initialization
Turn on the ADC module (AD1CON1<15>).
Clear the AD1IF bit.
Select ADC interrupt priority.
Figure
the
diagram
port
data
range
18-1. A block diagram of the ADC for
how
appropriate
rate
pins
(AD1CON1<7:5>
of
many
with
on
device
as
the
sample/conversion
processor
analog
DS70290G-page 169
sample-and-hold
analog
ADC
is
shown
for
inputs
inputs
clock
and
the
in
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