DSPIC33FJ16GP304T-I/ML Microchip Technology, DSPIC33FJ16GP304T-I/ML Datasheet - Page 145
![16-bit DSC, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ16GP304T-I/ML
Manufacturer Part Number
DSPIC33FJ16GP304T-I/ML
Description
16-bit DSC, 16KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
2.DSPIC33FJ16GP304-IPT.pdf
(284 pages)
3.DSPIC33FJ16GP304-IPT.pdf
(8 pages)
4.DSPIC33FJ16GP304-IPT.pdf
(14 pages)
Specifications of DSPIC33FJ16GP304T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ16GP304T-I/MLTR
- DSPIC33FJ12MC201-ISO PDF datasheet
- DSPIC33FJ16GP304-IPT PDF datasheet #2
- DSPIC33FJ16GP304-IPT PDF datasheet #3
- DSPIC33FJ16GP304-IPT PDF datasheet #4
- Current page: 145 of 284
- Download datasheet (4Mb)
14.0
FIGURE 14-1:
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
OUTPUT COMPARE
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section
(DS70209) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
16
TMR2
OUTPUT COMPARE MODULE BLOCK DIAGRAM
Comparator
13.
0
OCxRS
OCxR
TMR3
“Output
1
16
OCTSEL
Compare”
Rollover
TMR2
0
in
Rollover
TMR3
1
Mode Select
OCM<2:0>
The Output Compare module can select either Timer2
or Timer3 for its time base. The module compares the
value of the timer with the value of one or two compare
registers depending on the operating mode selected.
The state of the output pin changes when the timer
value matches the compare register value. The Output
Compare module generates either a single output
pulse or a sequence of output pulses, by changing the
state of the output pin on the compare match events.
The Output Compare module can also generate
interrupts on compare match events.
The Output Compare module has multiple operating
modes:
• Active-Low One-Shot mode
• Active-High One-Shot mode
• Toggle mode
• Delayed One-Shot mode
• Continuous Pulse mode
• PWM mode without fault protection
• PWM mode with fault protection
Output
Logic
3
Set Flag bit
OCxIF
Output
Enable
R
S
Q
Output
Enable
Logic
DS70290G-page 145
OCx
OCFA
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