DSPIC33EP256MU810-E/PF Microchip Technology, DSPIC33EP256MU810-E/PF Datasheet - Page 262

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DSPIC33EP256MU810-E/PF

Manufacturer Part Number
DSPIC33EP256MU810-E/PF
Description
100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP256MU810-E/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
12K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP256MU810-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 15-1:
DS70616E-page 262
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
Note 1:
ENFLTA
R/W-0
U-0
OCxR and OCxRS are double-buffered in PWM mode only.
Unimplemented: Read as ‘0’
OCSIDL: Stop Output Compare x in Idle Mode Control bit
1 = Output Compare x halts in CPU Idle mode
0 = Output Compare x continues to operate in CPU Idle mode
OCTSEL<2:0>: Output Compare x Clock Select bits
111 = Peripheral clock (F
110 = Reserved
101 = Reserved
100 = Timer1 clock (only the synchronous clock is supported)
011 = Timer5 clock
010 = Timer4 clock
001 = Timer3 clock
000 = Timer2 clock
ENFLTC: Fault C Input Enable bit
1 = Output Compare Fault C input (OCFC) is enabled
0 = Output Compare Fault C input (OCFC) is disabled
ENFLTB: Fault B Input Enable bit
1 = Output Compare Fault B input (OCFB) is enabled
0 = Output Compare Fault B input (OCFB) is disabled
ENFLTA: Fault A Input Enable bit
1 = Output Compare Fault A input (OCFA) is enabled
0 = Output Compare Fault A input (OCFA) is disabled
OCFLTC: PWM Fault C Condition Status bit
1 = PWM Fault C condition on OCFC pin has occurred
0 = No PWM Fault C condition on OCFC pin has occurred
OCFLTB: PWM Fault B Condition Status bit
1 = PWM Fault B condition on OCFB pin has occurred
0 = No PWM Fault B condition on OCFB pin has occurred
OCFLTA: PWM Fault A Condition Status bit
1 = PWM Fault A condition on OCFA pin has occurred
0 = No PWM Fault A condition on OCFA pin has occurred
TRIGMODE: Trigger Status Mode Select bit
1 = TRIGSTAT (OCxCON2<6>) is cleared when OCxRS = OCxTMR or in software
0 = TRIGSTAT is cleared only by software
R/W-0 HCS
OCFLTC
U-0
OCxCON1: OUTPUT COMPAREx CONTROL REGISTER 1
HCS = Hardware Clearable/Settable bit
W = Writable bit
‘1’ = Bit is set
R/W-0 HCS
OCFLTB
OCSIDL
R/W-0
P
)
R/W-0 HCS
OCFLTA
R/W-0
Preliminary
OCTSEL<2:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRIGMODE
R/W-0
R/W-0
R/W-0
R/W-0
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
OCM<2:0>
ENFLTC
R/W-0
R/W-0
ENFLTB
R/W-0
R/W-0
bit 8
bit 0

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