CY8CTST200A-16LGXI Cypress Semiconductor Corp, CY8CTST200A-16LGXI Datasheet - Page 70
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CY8CTST200A-16LGXI
Manufacturer Part Number
CY8CTST200A-16LGXI
Description
CY8CTST200A-16LGXI
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200A-16LGXI
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
13
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Processor Series
CY8CTxx2xxA
Core
M8C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.2
To use a 32.768 kHz external crystal, the GPIO pins that
connect to the crystal must be set to the High Impedance
drive mode. See the
on page 55
The firmware steps involved in switching between the Inter-
nal Low Speed Oscillator (ILO) to the 32.768 kHz External
Crystal Oscillator (ECO) are as follows.
At reset, the device begins operation using the ILO.
1. Set the ECO EX bit to allow crystal operation.
2. Modify bits [2:0] in the External Crystal Oscillator
3. Select a sleep interval of one second, using bits[4:3] in
4. Set bit [7] in the Oscillator Control Register 0
5. The ECO becomes the selected source at the end of the
External Crystal Oscillator (ECO)
70
ENBUS Register to be 011b.
the Oscillator Control Register 0 (OSC_CR0), as the
oscillator stabilization interval.
(OSC_CR0) to '1' to enable the external crystal oscilla-
tor.
one-second interval on the edge created by the sleep
interrupt logic. The one-second interval gives the oscilla-
tor time to stabilize before it becomes the active source.
The sleep interrupt need not be enabled for the switch-
over to occur. Reset the sleep timer (if this does not
interfere with any ongoing realtime clock operation), to
guarantee the interval length. Note that the ILO contin-
ues to run until the oscillator is automatically switched
over by the sleep timer interrupt.
This transition is allowed only if the
write once "ECO Exists" register bit
is set.
Application Overview
for information on GPIOs and their drive modes.
General Purpose I/O (GPIO) chapter
ILO Inactive
ECO Active
Set OSC_CR0[7] to activate
the ECO, then on the next
sleep interrupt, ECO becomes
the 32.768 kHz source.
Figure 9-2. State Transition Between ECO and ILO
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Note The ILO switches back instantaneously by writing the
32 kHz Select Control bit to '0'.
Note Transitions between oscillator domains may produce
glitches on the 32 kHz clock bus. Functions that require
accuracy on the 32 kHz clock should be enabled after the
transition in oscillator domains.
Clear OSC_CR0[7] to
immediately revert back
to ILO as 32 kHz source.
Default POR State
ECO Inactive
ILO Active
[+] Feedback
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