CY8CTST200A-16LGXI Cypress Semiconductor Corp, CY8CTST200A-16LGXI Datasheet - Page 279
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CY8CTST200A-16LGXI
Manufacturer Part Number
CY8CTST200A-16LGXI
Description
CY8CTST200A-16LGXI
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200A-16LGXI
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
13
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Processor Series
CY8CTxx2xxA
Core
M8C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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21.4.20 VLT_CR
This register is used to set the trip points for POR and LVD.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
page 144
Bit
5:4
3
2:0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
VLT_CR: 1,E3h
Access : POR
Bit Name
PORLEV[1:0]
LVDTBEN
VM[2:0]
Name
in the POR chapter.
Voltage Monitor Control Register
7
6
Description
Sets the POR level according to the DC Electrical Specifications in the PSoC device data sheet.
Enables reset of the CPU speed register by LVD comparator output.
Sets the LVD levels per the DC Electrical Specifications in the PSoCdevice data sheet, for those
devices with this feature.
000b
001b
010b
011b
100b
101b
110b
111b
Lowest voltage setting.
Highest voltage setting.
5
PORLEV[1:0]
RW : 0
4
LVDTBEN
RW : 0
3
2
1,E3h
VM[2:0]
RW : 0
Register Definitions on
1
1,E3h
VLT_CR
0
279
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