CY8CTST200-32LQXIT Cypress Semiconductor Corp, CY8CTST200-32LQXIT Datasheet - Page 199
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CY8CTST200-32LQXIT
Manufacturer Part Number
CY8CTST200-32LQXIT
Description
CY8CTST200-32LQXIT
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200-32LQXIT
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
28
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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21.3.12 EP0_CNT
The Endpoint 0 Count register (EP0_CNT) configures endpoint 0.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
page 171
Bit
7
6
3:0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
EP0_CNT : 0,37h
Access : POR
Bit Name
Data Toggle
Data Valid
Byte Count[3:0]
Name
in the Full-Speed USB chapter.
Endpoint 0 Count Register
Data Toggle
RW : 0
7
Data Valid
RC : 0
6
This bit selects the data packet's toggle state.
This bit indicates whether there were errors in OUT or setup transactions.
These bits indicate the number of data bytes in a transaction.
Description
5
4
3
2
Byte Count[3:0]
RW : 0
Register Definitions on
1
0,37h
EP0_CNT
0,37h
0
199
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