CY8C3865LTI-014 Cypress Semiconductor Corp, CY8C3865LTI-014 Datasheet - Page 116

• Manufacturer Part Number: CY8C3865LTI-014
• Description: CY8C3865LTI-014
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C38xxr

Specifications of CY8C3865LTI-014

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 67MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Peripherals: CapSense, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Data Converters: A/D 2x20b, D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: QFN EP
• Screening Level: Industrial
• Pin Count: 68
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C38
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 38
• Eeprom Memory Size: 1KB
• Ram Memory Size: 4KB
• Cpu Speed: 67MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document Number: 001-11729 Rev. *O
Description Title: PSoC
Document Number: 001-11729
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3: CY8C38 Family Datasheet Programmable System-on-Chip (PSoC
MKEA
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PRELIMINARY
Replaced V
text in USBIO section of Electrical Specifications.
Added Table 13-2 (Package MSL)
Modified Tstorag condition and changed max spec to 100
Added bullet (Pass) under ALU (section 7.2.2.2)
Added figures for kHzECO and MHzECO in the External Oscillator section
Updated Figure 6-1(Clocking Subsystem diagram)
Removed CPUCLK_DIV in table 5-2, Deleted Clock Divider SFR subsection
Updated PSoC Creator Framework image
Updated SIO DC Specifications (V
Updated bullets in Clocking System and Clocking Distribution sections
Updated Figure 8-2
Updated PCB Layout and Schematic, updated as per MTRB review comments
Updated Table 6-3 (power changed to current)
In 32kHZ EC DC Specifications table, changed I
In IMO DC Specifications table, updated Supply Current values
Updated GPIO DC Specs table
Minor ECN to post datasheet to external website
INL max is changed from 16 to 32 in Table 11-20, 20-bit Delta-sigma ADC AC
Specifications.
Added to Table 6-6 a footnote and references to same.
Added sentences to the resistive pullup and pull-down description bullets.
Added sentence to Section 6.4.11, Adjustable Output Level.
Updated section 5.5 External Memory Interface
Updated Table 11-73 JTAG Interface AC Specifications
Updated Table 11-74 SWD Interface AC Specifications
Updated style changes as per the new template.
Added 48-SSOP pin and package details.
Removed PLL output duty cycle spec.
Updated
Updated
Updated
Updated
“Current Digital-to-analog Converter(IDAC)”
“Voltage Digital to Analog Converter (VDAC)”
Table 11-2, “DC Specifications,”
Table 11-24, “Voltage Reference Specifications,”
DDIO
with V
PSoC
DDD
in USBIO diagram and specification tables, added
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3: CY8C38 Family Datasheet
IH
and V
on page 60
IL
parameters)
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Max to 0.25
on page 80
on page 84
on page 79
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