CY7C68320C-100AXA Cypress Semiconductor Corp, CY7C68320C-100AXA Datasheet - Page 4

• Manufacturer Part Number: CY7C68320C-100AXA
• Description: CY7C68320C-100AXA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB AT2LP™r

Specifications of CY7C68320C-100AXA

• Controller Type: USB 2.0 Controller
• Interface: I²C
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Package: 100TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-3035

Introduction
The
CY7C68320C/CY7C68321C)
bridge between one USB port and one or two ATA- or
ATAPI-based mass storage device ports. This bridge adheres to
the Mass Storage Class Bulk-Only Transport Specification (BOT)
and is intended for bus and self powered devices.
The AT2LP is the latest addition to the Cypress USB mass
storage portfolio, and is an ideal cost- and power-reduction path
for designs that previously used Cypress’s ISD-300A1,
ISD-300LP, or EZ-USB AT2.
Specifically, the CY7C68300C/CY7C68301C includes a mode
that makes it pin-for-pin compatible with the EZ-USB AT2
(CY7C68300A).
The USB port of CY7C68300C/301C and CY7C68320C/321A
(AT2LP) is connected to a host computer directly or with the
downstream port of a USB hub. Software on the USB host
system issues commands and sends data to the AT2LP and
receives status and data from the AT2LP using standard USB
protocol.
The ATA/ATAPI port of the AT2LP is connected to one or two
mass storage devices. A 4 kbyte buffer maximizes ATA/ATAPI
data transfer rates by minimizing losses due to device seek
times. The ATA interface supports ATA PIO modes 0, 3, and 4,
multiword DMA mode 2, and Ultra DMA modes 2, 3, and 4.
The device initialization process is configurable, enabling the
AT2LP to initialize ATA/ATAPI devices without software
intervention.
CY7C68300A Compatibility
As mentioned in the previous section, the CY7C68300C/301C
contains a backward compatibility mode that enables it to be
used in existing EZ-USB AT2 (CY7C68300A) designs. The
backward compatibility mode is enabled by programming the
EEPROM with the CY7C68300A signature.
During startup, the AT2LP checks the I
with a valid signature in the first two bytes. If the signature is
Document Number: 001-05809 Rev. *H
EZ-USB
AT2LP
(CY7C68300C/CY7C68301C
implements
2
C bus for an EEPROM
a
fixed-function
and
0x4D4D, the AT2LP configures itself for pin-to-pin compatibility
with the AT2 and begins normal mass storage operation. If the
signature is 0x534B, the AT2LP configures itself with the AT2LP
pinout and begins normal mass storage operation.
Refer to the logic flow in
pinout selection process.
Most designs that use the AT2 can migrate to the AT2LP with no
changes to either the board layout or EEPROM data. Cypress
has published an application note focused on migrating from the
AT2 to the AT2LP to help expedite the process. It can be
downloaded from the Cypress website (http://www.cypress.com)
or obtained through a Cypress representative.
Figure 1. Simplified Pinout Selection Flowchart
Normal Operation
Read EEPROM
(CY7C68300A)
EZ-USB AT2
EEPROM
Signature
0x4D4D?
Pinout
Yes
Set
CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
Figure 1
No
for more information on the
EZ-USB AT2LP
(CY7C68300B)
Pinout
Set
Page 4 of 44
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