CY14B101LA-ZS45XIT Cypress Semiconductor Corp, CY14B101LA-ZS45XIT Datasheet - Page 15

CY14B101LA-ZS45XIT

CY14B101LA-ZS45XIT

Manufacturer Part Number
CY14B101LA-ZS45XIT
Description
CY14B101LA-ZS45XIT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY14B101LA-ZS45XIT

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
1M (128K x 8)
Speed
45ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Software Controlled STORE/RECALL Cycle
Switching Waveforms
Document #: 001-42879 Rev. *K
Notes
t
t
t
t
t
RC
SA
CW
HA
RECALL
37. The software sequence is clocked with CE controlled or OE controlled reads.
38. The six consecutive addresses must be read in the order listed in
39. DQ output data at the sixth read may be invalid because the output is disabled at t
Parameter
HSB (STORE only)
[37, 38]
DQ (DATA)
DQ (DATA)
Address
Address
STORE/RECALL initiation cycle time
Address setup time
Clock pulse width
Address hold time
RECALL duration
RWI
OE
CE
CE
OE
t
Figure 12. CE and OE Controlled Software STORE/RECALL Cycle
SA
t
SA
t
LZCE
t
SA
t
Description
LZCE
t
Address #1
SA
Address #1
t
t
RC
CW
Figure 13. AutoStore Enable/Disable Cycle
t
RC
t
CW
t
HZCE
t
t
Table 2 on page
HA
HA
t
HZCE
t
t
HA
HA
Min
20
15
DELAY
6. WE must be HIGH during all six consecutive cycles.
t
0
0
DELAY
20 ns
Address #6
time.
Note
Max
200
t
RC
t
CW
39
t
HA
Address #6
High Impedance
Note
Min
t
25
20
t
STORE
RC
0
0
t
CW
39
25 ns
t
t
HA
HA
/t
RECALL
t
DELAY
t
Max
200
SS
[38]
t
HA
Min
45
30
0
0
CY14B101NA
CY14B101LA
45 ns
t
HHHD
Max
200
t
LZHSB
Page 15 of 26
Unit
ns
ns
ns
ns
µs
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