CY14B101LA-SP25XI Cypress Semiconductor Corp, CY14B101LA-SP25XI Datasheet
CY14B101LA-SP25XI
Specifications of CY14B101LA-SP25XI
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CY14B101LA-SP25XI Summary of contents
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... 16) nvSRAM Features 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 128 K × 8 (CY14B101LA × ■ 16 (CY14B101NA) Hands off automatic STORE on power-down with only a small ■ capacitor STORE to QuantumTrap nonvolatile elements initiated by ■ software, device pin, or AutoStore on power-down RECALL to SRAM initiated by software or power-up ■ ...
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... Software Controlled STORE/RECALL Cycle ................ 15 Hardware STORE Cycle ................................................. 16 Truth Table For SRAM Operations ................................ 17 Ordering Information ...................................................... 18 Part Numbering Nomenclature ...................................... 19 Package Diagrams .......................................................... 20 Acronyms ........................................................................ 23 Document Conventions ............................................. 23 Units of Measure ....................................................... 23 Document History Page ................................................ 24 Sales, Solutions, and Legal Information ...................... 26 Worldwide Sales and Design Support ....................... 26 Products .................................................................... 26 PSoC Solutions ......................................................... 26 CY14B101LA CY14B101NA Page [+] Feedback ...
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... HSB pin is not available in 44-TSOP II (×16) package. Document #: 001-42879 Rev. *K Figure 1. Pin Diagram - 44-Pin TSOP II A HSB [ [ [ CAP HSB DQ6 DQ7 28 DQ5 27 DQ4 26 DQ3 CY14B101LA CY14B101NA [ [ BHE BLE TSOP [ (×16 Top View (not to scale CAP 32-SOIC (×8) (x8) Top View (not to scale) Page [+] Feedback ...
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... AutoStore capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to nonvol- CAP supply atile elements connect No connect. This pin is not connected to the die. Document #: 001-42879 Rev. *K Figure 3. 48-Ball FBGA and 54-Pin TSOP [ Description - CY14B101LA CY14B101NA 54 HSB 1 [ BHE BLE TSOP (x16 ...
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... Device Operation The CY14B101LA/CY14B101NA nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell (the STORE operation), or from the nonvolatile cell to the SRAM (the RECALL operation) ...
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... Notes 10. BHE and BLE are applicable for x16 configuration only. 11. While there are 17 address lines on the CY14B101LA (16 address lines on the CY14B101NA), only the 13 address lines (A Rest of the address lines are do not care. 12. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle. ...
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... STORE and write operations. The low voltage condition is detected when V CC CY14B101LA/CY14B101NA write mode (both CE and WE are LOW) at power-up, after a RECALL or STORE, the write is inhibited until the SRAM is enabled after t active). This protects against inadvertent writes during power-up or brown out conditions. ...
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... V value to make sure there is extra CAP store charge and store time should discuss their V selection with Cypress to understand any impact on the V voltage level at the end period. RECALL CY14B101LA CY14B101NA value because CAP charge and CAP value. Customers CAP ...
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... V < Max, V < V < Max, V < V < > OUT < – pin and rated CAP SS CY14B101LA CY14B101NA = 25 °C) .................................................. 1.0 W Ambient Temperature V CC –40 °C to +85 °C 2 3.6 V [13] Min Typ Max 2.7 3.0 3.6 – – – – 10 – 35 – – – ...
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... Document #: 001-42879 Rev. *K Description Test Conditions = 25 ° MHz (Typ Test Conditions 54-TSOP II 48-SSOP 48-FBGA 44-TSOP II 32-SOIC Unit 36.4 37.47 10.13 24.71 Figure 5. AC Test Loads 3.0 V OUTPUT 789 Ω CY14B101LA CY14B101NA Min Unit 20 Years 1,000 K Max Unit °C/W 38.58 41.74 41.55 ° ...
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... RC Address Valid OHA CY14B101LA CY14B101NA Unit Min Max Min Max – 25 – – – 25 – – 12 – – 3 – – 3 – ns – 10 – 15 ...
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... Document #: 001-42879 Rev. *K Address Valid ACE LZCE t DOE t LZOE t DBE t LZBE Output Data Valid t PU Active [22, 24, 25, 26 Address Valid t t SCE PWE Input Data Valid t t LZWE HZWE High Impedance CY14B101LA CY14B101NA [22, 23, 24] t HZCE t HZOE t HZBE t PD Page [+] Feedback ...
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... HSB must remain HIGH during Read and Write cycles. 30 must be > V during address transitions.. IH Document #: 001-42879 Rev. *K [27, 28, 29, 30 Address Valid SCE PWE Input Data Valid High Impedance t WC Address Valid t SCE PWE Input Data Valid High Impedance CY14B101LA CY14B101NA [27, 28, 29, 30] Page [+] Feedback ...
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... Figure 11. AutoStore or Power-Up RECALL 32 Note t STORE t HHHD t LZHSB t DELAY t HRECALL Read & Write BROWN POWER-UP OUT RECALL AutoStore SWITCH. is lower than V CC SWITCH. CY14B101LA CY14B101NA Min Max Min Max – 20 – 20 – 8 – 8 – 25 – 25 – 2.65 – 2.65 150 – ...
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... Address # HZCE t DELAY Note Figure 13. AutoStore Enable/Disable Cycle HZCE Table 2 on page 6. WE must be HIGH during all six consecutive cycles. time. DELAY CY14B101LA CY14B101NA Min Max Min Max 25 – 45 – 0 – 0 – 20 – 30 – 0 – 0 – – 200 – 200 [38 HHHD ...
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... HSB driver is disabled SRAM is disabled as long as HSB (IN) is driven low DHSB DHSB [40, 41] Figure 15. Soft Sequence Processing t Soft Sequence SS Command Address #6 Address # power must remain HIGH to effectively register command. CC CY14B101LA CY14B101NA Unit Min Max Min Max – 25 – – 15 – ns μ ...
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... Data In (DQ –DQ ) Write Data In (DQ –DQ ); Write –DQ in High Data In (DQ –DQ ); Write –DQ in High for x16 configuration CY14B101LA CY14B101NA Mode Power Standby Active Active Active Mode Power Standby Active Active Active Active Active Active Active Active Active Active Page [+] Feedback ...
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... Ordering Information Speed Ordering Code (ns) 20 CY14B101LA-ZS20XIT CY14B101LA-ZS20XI 25 CY14B101LA-SZ25XIT CY14B101LA-SZ25XI CY14B101LA-ZS25XIT CY14B101LA-ZS25XI CY14B101LA-SP25XIT CY14B101LA-SP25XI CY14B101NA-ZS25XIT CY14B101NA-ZS25XI 45 CY14B101LA-SZ45XIT CY14B101LA-SZ45XI CY14B101LA-ZS45XIT CY14B101LA-ZS45XI CY14B101LA-SP45XIT CY14B101LA-SP45XI CY14B101LA-BA45XIT CY14B101LA-BA45XI CY14B101NA-ZS45XIT CY14B101NA-ZS45XI All the above parts are Pb-free. Document #: 001-42879 Rev. *K Package Package Type Diagram 51-85087 44-pin TSOP II ...
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... Blank - No Rev A - First Rev 14 - nvSRAM Cypress Document #: 001-42879 Rev. *K Option Tape and Reel Temperature: Blank - Std Industrial (- °C) Package: SZP - 32 SOIC ZSP - 44 TSOP II SPP - 48 SSOP BAP - 48 FBGA ZSP - 54 TSOP II Voltage 3.0 V CY14B101LA CY14B101NA Speed Data Bus x16 Density: 101 - 1 Mb Page [+] Feedback ...
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... Package Diagrams Document #: 001-42879 Rev. *K Figure 16. 32-Pin SOIC (51-85127) Figure 17. 44-Pin TSOP II (51-85087) CY14B101LA CY14B101NA 51-85127 *B 51-85087 *C Page [+] Feedback ...
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... Package Diagrams (continued) Document #: 001-42879 Rev. *K Figure 18. 48-Pin SSOP (51-85061) CY14B101LA CY14B101NA 51-85061 *D Page [+] Feedback ...
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... Package Diagrams (continued) Figure 19. 48-Ball FBGA - 1.2 mm (51-85128) Document #: 001-42879 Rev. *K CY14B101LA CY14B101NA 51-85128 *E Page [+] Feedback ...
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... Figure 20. 54-Pin TSOP II (51-85160) Document Conventions Units of Measure Symbol °C Hz kbit kHz KΩ μA mA μF MHz μ Ω W CY14B101LA CY14B101NA 51-85160 *A Unit of Measure degrees celsius hertz 1024 bits kilohertz kilo ohms microamperes milliampere microfarads megahertz microseconds millisecond nanoseconds picofarads volts ohms watts ...
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... Document History Page Document Title: CY14B101LA, CY14B101NA 1-Mbit (128 K × 8/64 K × 16) nvSRAM Document Number: 001-42879 Orig. of Submission Rev. ECN No. Change ** 2050747 UNC/PYRS 01/31/08 *A 2607447 GVCH/AESA 11/14/08 *B 2654484 GVCH/PYRS 02/05/09 Document #: 001-42879 Rev. *K Description of Change Date New Datasheet Removed 15 ns access speed Updated “ ...
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... Document Title: CY14B101LA, CY14B101NA 1-Mbit (128 K × 8/64 K × 16) nvSRAM Document Number: 001-42879 Orig. of Submission Rev. ECN No. Change *C 2733909 GVCH/AESA 07/09/09 *D 2757348 GVCH 08/28/09 *E 2793420 GVCH 10/27/09 *F 2839453 GVCH/PYRS 01/06/10 *G 2894534 GVCH 03/17/10 *H 2922854 GVCH 04/26/10 *I 2958648 GVCH 06/22/10 *J 3074645 GVCH ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 001-42879 Rev. *K All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised January 18, 2011 CY14B101LA CY14B101NA PSoC Solutions psoc.cypress.com/solutions PSoC 1 | ...