AM29LV065DU90REF Spansion Inc., AM29LV065DU90REF Datasheet - Page 3

• Manufacturer Part Number: AM29LV065DU90REF
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29LV065DU90REF

• Memory Size: 64Mbit
• Memory Configuration: 8M X 8
• Ic Interface Type: Parallel
• Access Time: 90ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Am29LV065D
64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only
Uniform Sector Flash Memory with VersatileIO
DISTINCTIVE CHARACTERISTICS
■ Single power supply operation
■ VersatileIO
■ High performance
■ Manufactured on 0.23 µm process technology
■ CFI (Common Flash Interface) compliant
■ SecSi (Secured Silicon) Sector region
■ Ultra low power consumption (typical values at 3.0 V,
■ Flexible sector architecture
■ Sector Protection
■ Embedded Algorithms
— 3.0 to 3.6 volt read, erase, and program operations
— Device generates output voltages and tolerates input
— Access times as fast as 90 ns
— Provides device-specific information to the system,
— 256-byte sector for permanent, secure identification
— May be programmed and locked at the factory or by
— Accessible through a command sequence
5 MHz)
— 9 mA typical active read current
— 26 mA typical erase/program current
— 200 nA typical standby mode current
— One hundred twenty-eight 64 Kbyte sectors
— A hardware method to lock a sector to prevent
— Sectors can be locked in-system or via programming
— Temporary Sector Unprotect feature allows code
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically writes
voltages on the DQ I/Os as determined by the voltage
on V
allowing host software to easily reconfigure for
different Flash devices
through an 16-byte random Electronic Serial Number
the customer
program or erase operations within that sector
equipment
changes in previously locked sectors
preprograms and erases the entire chip or any
combination of designated sectors
and verifies data at specified addresses
IO
input
TM
control
Refer to AMD’s Website (www.amd.com) for the latest information.
■ Compatibility with JEDEC standards
■ Minimum 1 million erase cycle guarantee per sector
■ Package options
■ Erase Suspend/Erase Resume
■ Data# Polling and toggle bits
■ Unlock Bypass Program command
■ Ready/Busy# pin (RY/BY#)
■ Hardware reset pin (RESET#)
■ ACC pin
■ Program and Erase Performance (V
■ 20-year data retention at 125°C
— Pinout and software compatible with single-power
— Superior inadvertent write protection
— 48-pin TSOP
— 63-ball FBGA
— Suspends an erase operation to read data from, or
— Provides a software method of detecting program or
— Reduces overall programming time when issuing
— Provides a hardware method of detecting program or
— Hardware method to reset the device for reading array
— Accelerates programming time for higher throughput
the ACC input pin)
— Byte program time: 5 µs typical
— Sector erase time: 0.9 s typical for each 64 Kbyte
— Reliable operation for the life of the system
supply Flash
program data to, a sector that is not being erased,
then resumes the erase operation
erase operation completion
multiple program command sequences
erase cycle completion
data
during system production
sector
TM
Control
Publication# 23544
Issue Date: February 16, 2006
Rev: C Amendment: 2
HH
not applied to