AM29LV065DU90REF Spansion Inc., AM29LV065DU90REF Datasheet - Page 26

• Manufacturer Part Number: AM29LV065DU90REF
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29LV065DU90REF

• Memory Size: 64Mbit
• Memory Configuration: 8M X 8
• Ic Interface Type: Parallel
• Access Time: 90ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

vice to normal operation.
and data requirements for both command sequences.
See also
Memory Region”
Byte Program Command Sequence
Programming is a four-bus-cycle operation. The pro-
gram command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program al-
gorithm. The system is not required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verifies the
programmed cell margin.
and data requirements for the byte program command
sequence.
When the Embedded Program algorithm is complete,
the device then returns to the read mode and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using
DQ7, DQ6, or RY/BY#. Refer to the Write Operation
Status section for information on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored. The SecSi
sector, autoselect, and CFI functions are not available
when a program function is in progress. Note that a
hardware reset immediately terminates the program
operation. The program command sequence should
be reinitiated once the device has returned to the read
mode, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed
from “0” back to a “1.” Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes to the device faster than using the stan-
dard program command sequence. The unlock bypass
command sequence is initiated by first writing two un-
lock cycles. This is followed by a third write cycle con-
taining the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle un-
lock bypass program command sequence is all that is
required to program in this mode. The first cycle in this
sequence contains the unlock bypass program com-
mand, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
26
“SecSi (Secured Silicon) Sector Flash
for further information.
Table 10
Table 10
shows the address
shows the address
Am29LV065D
ming time.
command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h. The second cycle must contain the data 00h. The
device then returns to the read mode.
The device offers accelerated program operations
through the ACC pin. When the system asserts V
the ACC pin, the device automatically enters the Un-
lock Bypass mode. The system may then write the
two-cycle Unlock Bypass program command se-
quence. The device uses the higher voltage on the
ACC pin to accelerate the operation. Note that the
ACC pin must not be at V
accelerated programming, or device damage may re-
sult.
Figure 4
ation. Refer to the Erase and Program Operations
table in the AC Characteristics section for parameters,
and
Note: See
Figure 16
Increment Address
illustrates the algorithm for the program oper-
Table 10
Figure 4. Program Operation
Table 10
for timing diagrams.
Embedded
in progress
algorithm
Program
for program command sequence.
shows the requirements for the
No
HH
for operations other than
Command Sequence
Write Program
Last Address?
Programming
from System
Verify Data?
Completed
Data Poll
START
February 16, 2006
Yes
Yes
No
HH
on