AM29F002BT-70JC Spansion Inc., AM29F002BT-70JC Datasheet - Page 12

• Manufacturer Part Number: AM29F002BT-70JC
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29F002BT-70JC

• Memory Size: 2Mbit
• Memory Configuration: 256K X 8
• Ic Interface Type: Parallel
• Access Time: 70ns
• Memory Case Style: PLCC
• No. Of Pins: 32
• Operating Temperature Range: 0°C To +70°C
• Termination Type: SMD

S ta tu
tic s ”
Standby Mode
W h en th e s y s te m is n ot re adin g o r w r iti ng to th e d ev ic e,
it c an pl ac e th e de v ic e i n the s ta nd by m o de . In th is
m o de, c u rren t c on s um ptio n i s gre atly r edu c ed, and the
o utputs a re plac e d i n the hi gh im pe dan c e s tate, in de-
p end ent of th e OE # inp ut.
The d evi ce e nters th e C M O S s ta ndb y m od e w h en C E#
a nd R ES ET # pin s (C E# o nly o n th e A m 29 F0 02 N B) are
b oth he ld at V
re s tric ted v olta ge ra nge th an V
the T T L s tan db y m od e w he n C E# a nd R E SE T # pin s
(C E # o nly o n the Am 2 9F 00 2N B ) ar e b oth h eld at V
T he dev ic e req uire s s ta nd ard ac c es s tim e (t
a cc e s s w h en the d ev ic e is in e ithe r o f the s e sta nd by
m o des , b efore i t is rea dy to r ead d ata.
T h e de v ic e a ls o e nte rs the s ta nd by m o de w he n the
R E SE T# pin is dr ive n lo w.
P
If th e d evi ce is de s ele cted du rin g er as ure or pro gram -
m i n g , t h e d e v i c e d r a w s a c ti v e c u r r e n t u n ti l th e
o pera tion is c om p leted .
In the D C C har ac ter is tic s tab les , I
s tand by cu rre nt s p ec ific ation .
1 0
in.”
Secto r
SA0
SA1
SA2
SA3
SA4
SA5
SA6
on pa ge 2 6 fo r tim i ng di agra m s .
s” for m or e i nfo rm a tion , and to
C C
A 17
T ab le 2.
0
0
1
1
1
1
1
±
0.5 V. (N ote tha t th i s i s a m o re
A 16
“R ES ET # : H a rdw a re R e s et
A m 29 F 002 B /A m 2 9F 00 2N B To p B o o t B lo ck S ect or A d d re ss Ta b le
0
1
0
1
1
1
1
I H
.) T he de vi c e e nte rs
C C3
“AC C har ac teri s-
A 15
X
X
X
0
1
1
1
re pr es e nts the
A m 29 F 002 B /A m 29 F 00 2N B
C E
) for r ead
A14
X
X
X
X
0
0
1
IH
.
A13
X
X
X
X
0
1
X
RESET#: Hardware Reset Pin
N o t e : T h e R E S E T # p i n i s n o t av a i l a b l e o n t h e
A m 29 F 002 N B.
T h e R E SE T # p in p rov id es a ha rdw ar e m e thod of re s et-
tin g th e dev ic e to r ead ing a rray d ata. W hen the s y s tem
d riv es the R ES ET # pin low fo r a t le as t a p eri od o f t
th e dev ic e im m e d ia te ly te r m in at es an y o per atio n i n
p rog res s, tr is ta tes all data outp ut pin s, a nd i gno res a ll
r ea d /w ri te atte m p ts fo r th e d ur ati on o f th e R E S ET #
p u l s e. T h e d e v i c e a l s o re s e ts th e i n te r n a l s ta t e
m ac hin e to rea din g arra y d ata. T h e op era tio n that w as
i nte rr u pte d s h ou ld be re in itia ted on c e th e d ev ic e is
r e a d y t o a c c e p t a n o th e r c o m m a n d s e q u e n c e , t o
e ns ur e da ta in tegr ity.
C ur re n t i s r e du c e d for th e d u ra tio n o f th e R E S ET #
p uls e. W h en R E SE T # is he ld a t V
th e T T L s ta n db y m od e; if R E SE T # i s h el d a t V
0 .5 V, the d ev ic e en te rs th e C M OS s tan dby m od e.
T h e R ES ET # p in ca n be tied to the s y s te m r es et c i r-
c u itry. A s y s tem r es et w ou ld th us al so re se t th e F la s h
m em or y, e nab ling the s y s tem to rea d th e bo ot-up fir m -
w a re from the F la s h m em o ry.
R efe r to th e AC C h a ra c ter is tic s tab le s fo r R E S ET #
p ara m eter s an d tim ing d iag ram .
Ou tp ut Disable Mode
W hen the O E# inp ut i s at V
d is abl ed. T h e o utpu t pin s are p lac ed in the hig h i m ped -
a nc e s tate.
Secto r Size
(Kbytes)
64
64
64
32
16
8
8
IH
, outp ut from the dev ic e is
(in hexadecim al)
3A000h–3BFFFh
3C000h–3F FFFh
00000h–0F FFF h
10000h–1F FFF h
20000h–2F FFF h
30000h–37FFF h
38000h–39FFF h
Ad dress R ange
IL
, the d ev ic e en ters
SS
R P
±
,