ADV7180KCP32Z Analog Devices Inc, ADV7180KCP32Z Datasheet - Page 83

• Manufacturer Part Number: ADV7180KCP32Z
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Subaddress
0x01
0x03
0x04
Register
Video selection
Output control
Extended
output control
Reserved
Bit Description
SQPE
ENVSPROC
Reserved
BETACAM
ENHSPLL
Reserved
SD_DUP_AV; duplicates
the AV codes from the
luma into the chroma path
Reserved
OF_SEL[3:0]; allows the
user to choose from a set
of output formats
TOD; three-state output
drivers; this bit allows the
user to three-state the
output drivers; pixel
outputs, HS, VS, FIELD,
and SFL
VBI_EN; allows VBI data
(Line 1 to Line 21) to be
passed through with
only a minimum amount
of filtering performed
Range; allows the user
to select the range of
output values; can be
ITU-R BT.656 compliant or
can fill the whole accessible
number range
EN_SFL_PIN
BL_C_VBI; blank chroma
during VBI; if set, it enables
data in the VBI region
to be passed through the
decoder undistorted
TIM_OE; timing signals
output enable
7
1
0
1
(Shading Indicates Default State)
6
0
1
0
1
Rev. F | Page 83 of 116
5
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
4
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bits
3
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
0
0
1
0
0
0
1
0
1
Comments
Set to default
Disable square pixel mode
Enable square pixel mode
Disable VSYNC processor
Enable VSYNC processor
Standard video input
Betacam input enable
Disable HSYNC processor
Enable HSYNC processor
AV codes to suit 8-bit interleaved data
output
AV codes duplicated (for 16-bit interfaces)
Set as default
Reserved
Reserved
16-bit at LLC 4:2:2
8-bit at LLC 4:2:2 ITU-R BT.656
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Output pins enabled
Drivers three-stated
Only active video region filtered
16 ≤ Y ≤ 235, 16 ≤ C/P ≤ 240
1 ≤ Y ≤ 254, 1 ≤ C/P ≤ 254
SFL output is disabled
SFL information output on the SFL pin
Decode and output color
Blank Cr and Cb
HS, VS, FIELD three-stated
HS, VS, FIELD forced active
Set to default
Set to default
All lines filtered and scaled
Notes
Options apply to
64-lead LQFP only
See also TIM_OE
and TRI_LLC
ITU-R BT.656
SFL output
enables encoder
and decoder to be
connected directly
During VBI
Controlled by TOD
Extended range
ADV7180