ADV7180KCP32Z Analog Devices Inc, ADV7180KCP32Z Datasheet - Page 51

• Manufacturer Part Number: ADV7180KCP32Z
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PVENDDELO, PAL VSYNC End Delay on Odd Field,
Address 0xE9[7]
When PVENDDELO is 0 (default), there is no delay.
Setting PVENDDELO to 1 delays VSYNC going low on an odd
field by a line relative to PVEND.
PVENDDELE, PAL VSYNC End Delay on Even Field,
Address 0xE9[6]
When PVENDDELE is 0 (default), there is no delay.
Setting PVENDDELE to 1 delays VSYNC going low on an even
field by a line relative to PVEND.
PVENDSIGN, PAL VSYNC End Sign, Address 0xE9[5]
Setting PVENDSIGN to 0 (default) delays the end of VSYNC
(set for user manual programming).
Setting PVENDSIGN to 1 advances the end of VSYNC (not
recommended for user programming).
PVEND[4:0], PAL VSYNC End, Address 0xE9[4:0]
The default value of PVEND is 10100, indicating the PAL
VSYNC end position.
For all NTSC/PAL VSYNC timing controls, both the V bit in
the AV code and the VSYNC signal on the VS pin are modified.
NOT VALID FOR USER
PROGRAMMING
VSYNC BY PVEND[4:0]
ADVANCE END OF
ADVANCE BY
PVENDDELO
ADDITIONAL
DELAY BY
0.5 LINE
VSEHO
1 LINE
YES
1
1
Figure 44. PAL VSYNC End
1
0
0
ODD FIELD?
PVENDSIGN
VSYNC END
0
0
DELAY END OF VSYNC
BY PVEND[4:0]
ADVANCE BY
ADDITIONAL
PVENDDELE
DELAY BY
0
0.5 LINE
VSEHE
1 LINE
NO
1
1
Rev. F | Page 51 of 116
PFTOGDELO, PAL Field Toggle Delay on Odd Field,
Address 0xEA[7]
When PFTOGDELO is 0 (default), there is no delay.
Setting PFTOGDELO to 1 delays the F toggle/transition on an
odd field by a line relative to PFTOG.
PFTOGDELE, PAL Field Toggle Delay on Even Field,
Address 0xEA[6]
When PFTOGDELE is 0, there is no delay.
Setting PFTOGDELE to 1 (default) delays the F toggle/transition
on an even field by a line relative to PFTOG.
PFTOGSIGN, PAL Field Toggle Sign, Address 0xEA[5]
Setting PFTOGSIGN to 0 delays the field transition. Set for user
manual programming.
Setting PFTOGSIGN to 1 (default) advances the field transition
(not recommended for user programming).
PFTOG, PAL Field Toggle, Address 0xEA[4:0]
The default value of PFTOG is 00011, indicating the PAL field
toggle position.
For all NTSC/PAL field timing controls, the F bit in the AV
code and the field signal on the FIELD pin are modified.
NOT VALID FOR USER
PROGRAMMING
ADVANCE TOGGLE OF
FIELD BY PFTOG[4:0]
PFTOGDELO
ADDITIONAL
DELAY BY
1 LINE
YES
1
Figure 45. PAL F Toggle
1
0
PFTOGSIGN
ODD FIELD?
TOGGLE
FIELD
0
FIELD BY PFTOG[4:0]
DELAY TOGGLE OF
PFTOGDELE
ADDITIONAL
DELAY BY
0
1 LINE
NO
1
ADV7180