ADUC814BRU Analog Devices Inc, ADUC814BRU Datasheet - Page 58

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ADUC814BRU

Manufacturer Part Number
ADUC814BRU
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC814BRU

Peak Reflow Compatible (260 C)
No
No. Of Bits
12 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
No. Of Inputs
6
Features
+3V Or +5V Operation
Package / Case
28-TSSOP
Rohs Status
RoHS non-compliant
Core Processor
8052
Core Size
8-Bit
Speed
16.78MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADUC814QSZ - KIT DEV FOR ADUC814 MICROCONVRTR
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC814BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADuC814
IP
SFR Address
Power-On Default
Bit Addressable
Table 30. IP SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
IEIP2
SFR Address
Power-On Default
Bit Addressable
Table 31. IEIP2 SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
---
---
Name
---
PTI
PPSM
PSI
---
ETI
EPSM
ESI
Name
---
PADC
PT2
PS
PT1
PX1
PT0
PX0
PADC
Description
Reserved.
Time Interval Counter Interrupt Priority.
Written to by the user to set TIC interrupt priority (1 = High; 0 = Low).
PSM Interrupt Priority.
Written to by the user to select power supply monitor interrupt priority (1 = High; 0 = Low).
SPI Serial Port Interrupt Priority.
Written to by the user to select SPI serial port interrupt priority (1 = High; 0 = Low).
Reserved. This bit must be 0.
TIC Interrupt.
Set by the user to enable the TIC interrupt.
Cleared by the user to disable the TIC interrupt.
Power Supply Monitor Interrupt.
Set by the user to enable the power supply monitor interrupt.
Cleared by the user to disable the power supply monitor interrupt.
SPI Serial Port Interrupt.
Set by the user to enable the SPI serial port interrupt.
Cleared by the user to disable the SPI serial port interrupt.
PT1
Reserved.
ADC Interrupt Priority.
Written to by user to set interrupt priority level (1 = High; 0 = Low).
Timer 2 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
UART Serial Port Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
Timer 1 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
External Interrupt 1 Priority (INT1).
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
Timer 0 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
External Interrupt 0 Priority (INT0).
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
Description
Interrupt Priority Register
B8H
00H
Yes
Secondary Interrupt Enable and Priority Register
A9H
No
A0H
PPSM
PT2
PSI
PS
Rev. A | Page 58 of 72
PT1
---
PX1
ETI
EPSM
PT0
PX0
ESI

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