ADUC7124BCPZ126-RL Analog Devices Inc, ADUC7124BCPZ126-RL Datasheet - Page 9

• Manufacturer Part Number: ADUC7124BCPZ126-RL
• Description: ARM7 With 12-Bit ADC & DACs, 128kB Flash
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7124BCPZ126-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 41.78MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 126KB (63K x 16)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI Timing
Table 4. SPI Master Mode Timing (Phase Mode = 1)
Parameter
t
t
t
t
t
t
t
t
t
1
SL
SH
DAV
DSU
DHD
DF
DR
SR
SF
t
UCLK
= 23.9 ns. It corresponds to the 41.78 MHz internal clock from the PLL before the clock divider.
SDATA (I/O)
SCLK (I)
(POLARITY = 0)
(POLARITY = 1)
t
PSU
Description
SCLOCK low pulse width
SCLOCK high pulse width
Data output valid after SCLOCK edge
Data input setup time before SCLOCK edge
Data input hold time after SCLOCK edge
Data output fall time
Data output rise time
SCLOCK rise time
SCLOCK fall time
SCLOCK
SCLOCK
CONDITION
MOSI
MISO
STOP
P
t
BUF
CONDITION
START
S
t
DSU
t
SHD
1
t
1
DAV
MSB
t
SH
1
Figure 3. SPI Master Mode Timing (Phase Mode = 1)
t
DSU
Figure 2. I
MSB IN
t
DHD
t
DHD
1
MSB
2–7
t
2
SL
C-Compatible Interface Timing
Rev. B | Page 9 of 104
1
t
DF
t
t
H
L
LSB
8
t
BIT 6 TO BIT 1
DR
BIT 6 TO BIT 1
t
DSU
Min
1 × t
2 × t
UCLK
UCLK
ACK
t
9
SR
t
RSU
Typ
(SPIDIV + 1) × t
(SPIDIV + 1) × t
5
5
5
5
t
DHD
REPEATED
START
t
LSB IN
S(R)
SF
ADuC7124/ADuC7126
LSB
UCLK
UCLK
t
F
MSB
t
F
1
t
R
t
Max
25
12.5
12.5
12.5
12.5
R
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns