ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 121

• Manufacturer Part Number: ADUC7036BCPZ-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7036BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LIN Frame Data Transmission and Reception
When the break symbol and synchronization byte have been
correctly received, data is transmitted and received via the COMTX
and COMRX MMRs, after UART is configured to the required
baud rate. To configure the UART for use with LIN requires the
use of the following UART MMRs:
•
•
•
•
COMDIV0: divisor latch (low byte).
COMDIV1: divisor latch (high byte).
COMDIV2: 16-bit fractional baud divide register. The
required values for COMDIV0, COMDIV1, and COMDIV2
are derived from the LHSVAL0, to generate the required
baud rate.
COMCON0: line control register. As soon as the UART is
correctly configured, the LIN protocol for receiving and
transmitting data is identical to the UART specification.
BREAK
START
START
START
BIT
BIT
13
BIT
> = 14
t
BIT
t
BIT
BIT0
t
t
ID0
t
BIT
BIT
BIT
START
BIT
>1
t
BIT
BIT1
ID1
STA S0
Figure 50. LIN Identifier Byte Field
2
Figure 47. LIN Interface Timing
t
Figure 51. LIN Data Byte Field
BIT
Figure 49. LIN Sync Byte Field
Figure 48. LIN Break Field
BIT2
ID2
Rev. C | Page 121 of 132
SYNC
t
S1
BREAK
2
t
BIT
8
S2
BIT3
t
ID3
BIT
> 13
S3
t
BIT
2
t
BIT
BIT4
S4
ID4
To manage data on the LIN bus requires use of the following
UART MMRs:
•
•
•
•
In addition, transmitting data on the LIN bus requires that the
relevant data be placed into COMTX, and reading data received
on the LIN bus requires the monitoring of COMRX. To ensure
that data is received or transmitted correctly, COMSTA0 should
be monitored. For more information, see the UART Serial
Interface and UART Register Definitions sections.
Under software control, it is possible to multiplex the UART data
lines (TxD and RxD) to the external GPIO_7/IRQ4 and
GPIO_8/IRQ5 pins. For more information, see the GPIO Port1
Control Register (GP1CON) section.
S5
COMTX: 8-bit transmit register
COMRX: 8-bit receive register
COMCON0: line control register
COMSTA0: line status register
2
t
BIT
BIT5
ID5
S6
S7 STO
BIT6
P0
DELIMIT
BREAK
BIT7
P1
PROTECTED ID
STOP
STOP
STOP
BIT
BIT
BIT
ADuC7036