ADUC7036BCPZ-RL Analog Devices Inc, ADUC7036BCPZ-RL Datasheet - Page 103

Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.

ADUC7036BCPZ-RL

Manufacturer Part Number
ADUC7036BCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7036BCPZ-RL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
HANDLING INTERRUPTS FROM THE HIGH
VOLTAGE PERIPHERAL CONTROL INTERFACE
An interrupt controller is integrated with the high voltage circuits.
If the interrupt controller is enabled through IRQEN[16], one of
six high voltage sources can assert the high voltage interrupt
(IRQ3) signal and interrupt the MCU core.
Although the normal MCU response to this interrupt event is
to vector to the IRQ or FIQ vector address, the high voltage
interrupt controller simultaneously and automatically loads the
current value of the high voltage status register (HVSTA) into the
HVDAT register. During this time, the busy bit in HVCON[0] is
set to indicate that a transfer is in progress and then is cleared
after 10 μs to indicate the HVSTA contents are available in HVDAT.
The interrupt handler, therefore, can poll the busy bit in HVCON
until it deasserts. After the busy bit is cleared, HVCON[1] must
be checked to ensure that the data was read correctly. Next, the
Table 78. High Voltage Diagnostics
High
Voltage Pin
LIN or STI
WU
Fault Condition
Short between LIN or
STI and VBAT
Short between LIN or
STI and GND
Short between wake-up
and VBAT
Short between wake-up
and GND
Open circuit
Method
Drive LIN or STI low
Drive LIN or STI high
Drive WU low
Drive WU high
Enable OC diagnostic resistor
with WU disabled
Rev. C | Page 103 of 132
HVDAT register can be read. At this time, HVDAT holds the value
of the HVSTA register. The status flags can then be interrogated
to determine the exact source of the high voltage interrupt, and
the appropriate action can be taken.
LOW VOLTAGE FLAG (LVF)
The ADuC7036 features a low voltage flag (LVF) that allows the
user to monitor REG_DVDD. When enabled via HVCFG0[2],
the low voltage flag can be monitored through HVMON[3]. If
REG_DVDD drops below 2.1 V, HVMON[3] is cleared and the
RAM contents are corrupted. After the low voltage flag is enabled,
it is reset only by REG_DVDD dropping below 2.1 V or by
disabling the LVF functionality using HVCFG0[2].
HIGH VOLTAGE DIAGNOSTICS
It is possible to diagnosis fault conditions on the WU, LIN, and
STI pins, as described in Table 78.
Result
LIN or STI short-circuit interrupt is generated after 20 μs if
more than 100 mA is continuously drawn.
LIN or STI readback reads back low.
Readback high in HVMON[7].
WU short-circuit interrupt is generated after 400 μs if more
than 100 mA typically is sourced.
HVMON[7] is cleared if the load is connected and set if WU is
open-circuited.
ADuC7036

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