ADSP-BF504BCPZ-3F Analog Devices Inc, ADSP-BF504BCPZ-3F Datasheet - Page 63

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ADSP-BF504BCPZ-3F

Manufacturer Part Number
ADSP-BF504BCPZ-3F
Description
Blackfin W/Processor & Executable Flash
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr
Datasheet

Specifications of ADSP-BF504BCPZ-3F

Interface
CAN, EBI/EMI, I²C, IrDA, PPI, SPI, SPORT, UART/USART
Clock Rate
300MHz
Non-volatile Memory
FLASH (16MB)
On-chip Ram
68kB
Voltage - I/o
3.30V
Voltage - Core
1.29V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-BF504BCPZ-3F
Manufacturer:
ADI
Quantity:
1 000
Analog Inputs
The ADC has a total of 12 analog inputs. Each on-board ADC
has six analog inputs that can be configured as six single-ended
channels, three pseudo differential channels, or three fully dif-
ferential channels. These may be selected as described in the
Analog Input Selection
Single-Ended Mode
The ADC can have a total of 12 single-ended analog input chan-
nels. In applications where the signal source has high
impedance, it is recommended to buffer the analog input
before applying it to the ADC. The analog input range can be
programmed to be either 0 to V
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias up this sig-
nal to make it correctly formatted for the ADC.
a typical connection diagram when operating the ADC in sin-
gle-ended mode.
Figure 67. THD vs. Analog Input Frequency for Various Supply Voltages
–60
–65
–70
–75
–80
–85
–90
–50
–55
–60
–65
–70
–75
–80
–85
–90
0
0
F
V
RANGE = 0 TO V
F
V
RANGE = 0V TO V
SAMPLE
DD
SAMPLE
DD
Figure 66. THD vs. Analog Input Frequency for
Various Source Impedances, Differential Mode
100
100
= 3V/5V
= 3V
R
V
SINGLE-ENDED MODE
= 1.5MSPS/2MSPS
SOURCE
= 1.5MSPS
R
200
DD
200
SOURCE
= 5V
section.
300
REF
300
=
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (kHz)
REF
=
10Ÿ
V
DIFFERENTIAL MODE
DD
400
400
= 3V
REF
500
500
or 0 to 2 × V
R
SOURCE
600
600
R
R
SOURCE
V
DIFFERENTIAL MODE
SOURCE
V
SINGLE-ENDED MODE
DD
DD
700
700
=
= 5V
= 3V
47Ÿ
=
=
300Ÿ
Figure 68
800
800
100Ÿ
REF
Rev. 0 | Page 63 of 80 | December 2010
.
900
900
1000
1000
shows
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Differential Mode
The ADC can have a total of six differential analog input pairs.
Differential signals have some benefits over single-ended sig-
nals, including noise immunity based on the device’s common-
mode rejection and improvements in distortion performance.
Figure 69 (Differential Input
ential analog input of the ADC.
The amplitude of the differential signal is the difference between
the signals applied to the V
pair (V
by two signals each of amplitude V
on the range chosen) that are 180° out of phase. The amplitude
of the differential signal is, therefore (assuming the 0 to V
range is selected) –V
regardless of the common mode (CM).
The common mode is the average of the two signals
and is, therefore, the voltage on which the two inputs are
centered.
This results in the span of each input being CM ± V
voltage has to be set up externally and its range varies with the
reference value, V
mon-mode range decreases. When driving the inputs with an
amplifier, the actual common-mode range is determined by the
amplifier’s output voltage swing.
Figure 70 (Input Common-Mode Range vs. VREF (0 to VREF
Range, VDD = 5
Range vs. VREF (2 × VREF Range, VDD = 5
common-mode range typically varies with V
+1.25V
–1.25V
0V
(V
IN+
IN+
Figure 68. Single-Ended Mode Connection Diagram
V
+ V
VOLTAGE
COMMON
IN–
MODE
IN–
). V
Figure 69. Differential Input Definition
)/2
V)) and
V
REF
IN
IN+
1
REF
. As the value of V
1
ADDITIONAL PINS OMITTED FOR CLARITY.
and V
ADDITIONAL PINS OMITTED FOR CLARITY.
3R
R
to +V
R
Figure 71 (Input Common-Mode
IN+
V
V
IN–
REF
REF
Definition) defines the fully differ-
REF
and V
should be simultaneously driven
R
p-p
p-p
peak-to-peak (2 × V
REF
+2.5V
IN–
0V
(or 2 × V
V
V
REF
IN+
IN–
pins in each differential
ADC
V
V
increases, the com-
A1
B6
1
REF
V)) show how the
(D
CAP
REF
for a 5 V power
ADC
V
A/D
, depending
REF
REF
1
CAP
0.47μF
REF
/2. This
B)
),
REF

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