ADSP-21160MKB-80 Analog Devices Inc, ADSP-21160MKB-80 Datasheet - Page 28

• Manufacturer Part Number: ADSP-21160MKB-80
• Description: IC,DSP,32-BIT,CMOS,BGA,400PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21160MKB-80

• Rohs Compliant: NO
• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 80MHz
• Non-volatile Memory: External
• On-chip Ram: 512kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA

ADSP-21160M
Asynchronous Read/Write—Host to ADSP-21160M
Use these specifications
chronous host processor accesses of an ADSP-21160M,
after the host has asserted CS and HBR (low). After HBG
Table 14. Read Cycle
Parameter
Timing Requirements:
t
t
t
t
t
Switching Characteristics:
t
t
t
t
SADRDL
HADRDH
WRWH
DRDHRDY
DRDHRDY
SDATRDY
DRDYRDL
RDYPRD
HDARWH
Address Setup/CS Low Before RDx Low
Address Hold/CS Hold Low After RDx
RDx/WRx High Width
RDx High Delay After REDY (O/D) Disable
RDx High Delay After REDY (A/D) Disable
Data Valid Before REDY Disable from Low
REDY (O/D) or (A/D) Low Delay After RDx Low
REDY (O/D) or (A/D) Low Pulsewidth for Read
Data Disable After RDx High
(Table 14
Figure 20. Read Cycle (Asynchronous Read—Host to ADSP-21160M)
and
Table
15) for asyn-
–28–
is returned by the ADSP-21160M, the host can drive the
RDx and WRx pins to access the ADSP-21160M’s internal
memory or IOP registers. HBR and HBG are assumed low
for this timing
Min
0
2
5
0
0
2
t
2
CK
Max
10
6
REV. 0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns