ADSP-21160MKB-80 Analog Devices Inc, ADSP-21160MKB-80 Datasheet - Page 16

• Manufacturer Part Number: ADSP-21160MKB-80
• Description: IC,DSP,32-BIT,CMOS,BGA,400PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21160MKB-80

• Rohs Compliant: NO
• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 80MHz
• Non-volatile Memory: External
• On-chip Ram: 512kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA

ADSP-21160M
Clock Input
Table 4. Clock Input
Reset
Table 5. Reset
1
2
Applies after the power-up sequence is complete. At power-up, the processor’s internal phase-locked loop requires no more than 100 ms while RESET is
low, assuming stable VDD and CLKIN (not including start-up time of external clock oscillator).
Only required if multiple ADSP-21160Ms must come out of reset synchronous to CLKIN with program counters (PC) equal. Not required for multiple
ADSP-21160Ms communicating over the shared bus (through the external port), because the bus arbitration logic automatically synchronizes itself
after reset.
Parameter
Timing Requirements:
t
t
t
t
Parameter
Timing Requirements:
t
t
CK
CKL
CKH
CKRF
WRST
SRST
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKIN Rise/Fall (0.4V–2.0V)
RESET Pulsewidth Low
RESET Setup Before CLKIN High
1
Figure 10. Clock Input
2
Figure 11. Reset
–16–
Min
4t
8
CK
80 MHz
Min
25
10.5
10.5
Max
Max
80
40
40
3
REV. 0
Unit
ns
ns
ns
ns
Unit
ns
ns