ADSP-21060KS-160 Analog Devices Inc, ADSP-21060KS-160 Datasheet - Page 38
![Digital Signal Processor IC](/photos/6/71/67190/sp-240-2_sml.jpg)
ADSP-21060KS-160
Manufacturer Part Number
ADSP-21060KS-160
Description
Digital Signal Processor IC
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr
Datasheets
1.ADSP-21062KSZ-133.pdf
(64 pages)
2.ADSP-21060KS-160.pdf
(47 pages)
3.ADSP-21060KS-160.pdf
(64 pages)
Specifications of ADSP-21060KS-160
Supply Voltage Max
5.25V
Dsp Type
Fixed / Floating Point
Mounting Type
Surface Mount
Package / Case
240-MQFP
Memory Organization - Ram
4M
Rohs Status
RoHS non-compliant
Interface
Host Interface, Link Port, Serial Port
Clock Rate
40MHz
Non-volatile Memory
External
On-chip Ram
512kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 85°C
Device Core Size
32b
Architecture
Super Harvard
Format
Floating Point
Clock Freq (max)
40MHz
Mips
40
Device Input Clock Speed
40MHz
Ram Size
512KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
MQFP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-21060KS-160
Manufacturer:
AD
Quantity:
5 510
Company:
Part Number:
ADSP-21060KS-160
Manufacturer:
SHARP
Quantity:
5 510
Company:
Part Number:
ADSP-21060KS-160
Manufacturer:
Analog Devices Inc
Quantity:
10 000
JTAG Test Access Port and Emulation
Parameter
Timing Requirements:
t
t
t
t
t
t
Switching Characteristics:
t
t
NOTES
1
2
ADSP-21060/ADSP-21060L
System Inputs = DATA
System Outputs = DATA
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT
DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT
TCK Period
TDI, TMS Setup before TCK High
TDI, TMS Hold after TCK High
System Inputs Setup before TCK Low
System Inputs Hold after TCK Low
TRST Pulsewidth
TDO Delay from TCK Low
System Outputs Delay after TCK Low
47-0
47-0
, ADDR
OUTPUTS
SYSTEM
SYSTEM
, ADDR
INPUTS
TMS
TDO
TCK
TDI
31-0
31-0
, RD, WR, ACK, SBTS, SW, HBR, HBG, CS, DMAR1, DMAR2, BR
, MS
3-0
, RD, WR, ACK, PAGE, ADRCLK, SW, HBG, REDY, DMAG1, DMAG2, BR
t
DTDO
1
t
t
STAP
DSYS
1
2
3-0
, LxCLK, LxACK, EBOOT, LBOOT, BMS, CLKIN, RESET.
3-0
Min
t
5
6
7
18
4t
CK
, LxCLK, LxACK, BMS.
CK
ADSP-21060
t
t
TCK
HTAP
Max
13
18.5
t
SSYS
6-1
, ID
2-0
Min
t
5
6
7
18.5
4t
CK
, RPBA, IRQ
CK
ADSP-21060L
t
HSYS
6-1
, CPA, FLAG
2-0
, FLAG
Max
13
18.5
3-0
, DR0, DR1,
3-0
, TIMEXP, DT0,
Units
ns
ns
ns
ns
ns
ns
ns
ns