ADN4604ASVZ-RL Analog Devices Inc, ADN4604ASVZ-RL Datasheet - Page 26

• Manufacturer Part Number: ADN4604ASVZ-RL
• Description: 4.25Gbps 16x16 Crossbar Switch
• Manufacturer: Analog Devices Inc
• Series: XStream™r

Specifications of ADN4604ASVZ-RL

• Function: Crosspoint Switch
• Circuit: 1 x 16:16
• On-state Resistance: 56 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 2.7 V ~ 3.6 V
• Current - Supply: 95mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADN4604
SPI SERIAL CONTROL INTERFACE
The SPI serial interface of the ADN4604 consists of four wires:
CS , SCK, SDI, and SDO. CS is used to select the device when
more than one device is connected to the serial clock and data
lines. CS is also used to distinguish between read and write
commands (see
of the part. Data can either contain eight bits of register address
or data.
The SDI line is used to write to the registers, and the SDO line
is used to read data back from the registers. Data on SDI is
clocked on the rising edge of SCK. Data on SDO changes on the
falling edge of SCK. The recommended pull-up resistor value is
between 500 Ω and 1 kΩ. Strong pull-ups are needed when
serial clock speeds that are close to the maximum limit are used
or when the SPI interface lines are experiencing large capacitive
loading. Larger resistor values can be used for pull-up resistors
when the serial clock speed is reduced.
The part operates in slave mode and requires an externally
applied serial clock to the SCLK input. The serial interface is
designed to allow the part to be interfaced to systems that
provide a serial clock that is synchronized to the serial data.
Write Operation
Figure 48 shows the diagram for a write operation to the
ADN4604. Data is clocked into the registers on the rising edge
of SCK. When the CS line is high, the SDI and SDO lines are in
Figure 48
SD
SDO
). SCK is used to clock data in and out
SDI
SDI
CS
CS
O
Figure 48. SPI—Correct Use of CS During SPI Communications
ADDRESS
ADDRESS
HI-Z
WRITE OPERATION
READ OPERATION
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HI-Z
three-state mode. Only when the CS goes from high to low does
the part accept any data on the SDI line. To allow continuous
writes, the address pointer register auto-increments by one
without having to load the address pointer register each time.
Subsequent data bytes are written into sequential registers. Note
that not all registers in the 256-byte address space exist and not
all registers are writable. Zeroes should be entered for
nonexisting address fields when implementing a continuous
write operation. Address 0xD0 to Address 0xEF are reserved
and should not be overwritten. A continuous write sequence is
shown in
Read Operation
Figure 48 shows the diagram for a write operation to the
ADN4604. To read back from a register, first write to the
address pointer register with the desired starting address. A
read command is distinguished from a write command by the
occurrence of CS going high after the address pointer is written.
Subsequent clock cycles with CS asserted low stream data
starting from the desired register address onto SDO, MSB first.
SDO changes on the falling edge of SCK.
Multiple data reads are possible in SPI interface mode as the
address pointer register is auto-incremented. A continuous read
sequence is shown in Figure 50.
DATA
Figure 49
XXXXXXXX
DATA
.